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TPS40140 Datasheet(PDF) 50 Page - Texas Instruments

 Part No. TPS40140 Description DUAL OR 2-PHASE, STACKABLE CONTROLLER Download 65 Pages Scroll/Zoom 100% Manufacturer TI [Texas Instruments] Direct Link http://www.ti.com Logo

TPS40140 Datasheet(HTML) 50 Page - Texas Instruments

 50 / 65 pagewww.ti.comIN(nom)PH2OUTPHPHPH2PHPHswOUT2323PHPHPHPHPHPHI(N, D) =V× (1- D)k(N, D)k(N, D) + 1N[(D -) × (- D)] + () × [] ×NN12 × DL × f× Ik(N, D)k(N, D) + 1[(k(N, D) + 1) × (D -) + k(N, D) × (- D) ]NN(38)6.2.3Step 3: Peripheral Component DesignR + 1.3339.2103f*1.041SW* 7 + 71.5 kW(39)TPS40140DUAL OR 2-PHASE, STACKABLE CONTROLLERSLUS660A – SEPTEMBER 2005 – REVISED JULY 2006Another important thing for the input capacitor is the RMS ripple current rating. Due to the interleaving ofmulti-phase, the input RMS current is reduced. The input ripple current RMS value over load current iscalculated by:where• k(NPH, D) = floor (NPH× D),in this example, k(NPH, D) =0• Floor(x) is the function to return the greatest integer less than or equal to x• NPH is the number of active phases, in this example, NPH=2So in this design, the maximum input ripple RMS current is calculated to be 7.2 A with the minimum inputvoltage. It is about 34% reduction compared with a 32-A single-phase converter design. Each selectedceramic capacitor has a RMS current rating of 4.3 A and, therefore, sufficient to reach this requirement.6.2.3.1 Switching Frequency Setting (RT pin 5)Here, fswrepresents the phase switching frequency. In the design, a 64.9-kΩ resistor is selected. Theactual switching frequency is 490 kHz.6.2.3.2 COMP1 and COMP2 (pin 35 and pin 10)COMP1 is connected to the compensator network. The selection of compensation components is similarto the dual output design example.COMP2 is directly tied to COMP1.6.2.3.3 TRK1 and TRK2 (pin 33 and pin 12)A soft start capacitor is connected between TRK1 and GND. TRK2 is directly tied to BP5 to set thischannel as a salve.6.2.3.4 ILIM1 and ILIM2 (pin 34 and pin 11)ILIM1 is connected to the resistor network that has the same design as the dual output example. The peakcurrent in Equation 22 and Equation 23 is the peak current of each phase.ILIM2 is grounded.6.2.3.5 FB1 and FB2 (pin 36 and pin 9)FB1 is tied to the feedback network. FB2 is connected to GND.6.2.3.6 PHSEL (pin 4)For this two phase configuration, the PHSEL pin is directly tied to GND.6.2.3.7 PGOOD1 and PGOOD2 (pin 30 and pin 15)Both of PGOOD1 and PGOOD2 are tied to BP5 with a 10-kΩ resistor.6.2.3.8 CLKIO (pin 28)CLKIO is open as no clock synchronization required for two phase configuration.DESIGN EXAMPLES50Submit Documentation Feedback

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