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TPS40140 Datasheet(PDF) 46 Page - Texas Instruments

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Part No. TPS40140
Description  DUAL OR 2-PHASE, STACKABLE CONTROLLER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS40140 Datasheet(HTML) 46 Page - Texas Instruments

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boot
Qg
8nc
C
=
=
= 16nF
V
0.5V
(24)
3
-9
3
T s s = C s s × 5 8 × 1 0
= 2 2 × 1 0
× 5 8 × 1 0
= 1 .2 8 m s
(25)
6.1.6
Feedback Compensator Design (COMP1 pin 35)
OUT
OUT
s
OUT
OUT
(s × C
× ESR + 1) × R
1
1
Gvc(s) =
×
×
DCR × Ac
s × τ + 1
s × C
× R
+ 1
(26)
s
ramp
OUT
ramp
IN
OUT
OUT
T
τ =
V
V
-
× DCR × Ac
T
L
ln(
)
V
V
- V
2 × V
-
× DCR × Ac -
× DCR × Ac
T
L
L
(27)
TPS40140
DUAL OR 2-PHASE, STACKABLE CONTROLLER
SLUS660A – SEPTEMBER 2005 – REVISED JULY 2006
6.1.5.7 PHSEL (pin 4)
For this dual output configuration, the PHSEL pin is directly tied to GND. The channel 1 and channel 2 has
a 180
° phase shift.
6.1.5.8 VSHARE (pin 6)
A 1
µF capacitor is tied from VSHARE pin to GND.
6.1.5.9 PGOOD1 (pin 30)
The PGOOD1 pin is tied to BP5 with a 10-k
Ω resistor.
6.1.5.10 UVLO_CE1 (pin 29)
It is connected to the input voltage with a resistor divider. The two resistors have the same value of 10-k
Ω.
When the input voltage is higher than 2 V, the chip is enabled.
6.1.5.11 CLKIO (pin 28)
CLKIO is floating as no clock synchronization required for dual output configuration.
6.1.5.12 BOOT1 and SW1 (pin 27 and 25)
A bootstrap capacitor is connected between the BOOT1 and SW1 pin. The bootstrap capacitor depends
on the total gate charge of the high side MOSFET and the amount of droop allowed on the bootstrap
capacitor.
For this application, a 0.1-
µF capacitor is selected.
6.1.5.13 TRK1 (pin 33)
A 22-nF capacitor is tied to TRK1 pin to provide 1.28 ms soft start time.
6.1.5.14 DIFFO, VOUT and GSNS (pin 1, pin 2 and pin 3)
VOUT and GSNS are connected to the remote sensing output connector. DIFFO is connected to the
feedback resistor divider. If the differential amplifier is not used, VOUT and GSNS are suggested to be
grounded, and DIFFO is left open.
Peak current mode control method is employed in the controller. A small signal model is developed from
the COMP signal to the output.
The time constant is defined by:
The low frequency pole is calculated by:
DESIGN EXAMPLES
46
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