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TPS40140 Datasheet(PDF) 45 Page - Texas Instruments

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Part No. TPS40140
Description  DUAL OR 2-PHASE, STACKABLE CONTROLLER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS40140 Datasheet(HTML) 45 Page - Texas Instruments

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R + 1.33
39.2
103
f*1.041
SW
* 7 + 71.5 kW
(16)
BIAS
OUT
R1
R
= 0.7 ×
= 8.75k
V
- 0.7
(17)
L
R1//R2 =
= 5k
DCR × C1
(18)
R 1 = R 2 = 10k
(19)
IN
(eqv)
ramp
sw
V × Ac
L
>
DCR
2 × V
× f
(20)
(eqv)
R2
DCR
DCR
=
× DCR =
R1 + R2
2
(21)
R1 +
I
PK
DCReqv
Ac ) VOS )
0.9
V
IN
1 *
0.5
V
IN
20
10*6
+ 22.5 kW
(22)
R2 +
I
PK
DCReqv
Ac ) VOS )
0.9
V
IN
0.5
V
IN
20
10*6
+ 510 kW
(23)
TPS40140
DUAL OR 2-PHASE, STACKABLE CONTROLLER
SLUS660A – SEPTEMBER 2005 – REVISED JULY 2006
6.1.5.1 Switching Frequency Setting (RT pin 5):
In the design, a 62-k
Ω resistor is selected. The actual switching frequency is 510kHz.
6.1.5.2 Output Voltage Setting (FB1 pin 36):
Substitute R1 with 10 k
Ω and then calculate R
BIAS.
6.1.5.3 Current Sensing Network Design (CS1 pin 31 and CSRT1 pin32)
For small pulse width, to avoid the sub-harmonics brought by the loop delay, a resistor divider is usually
used to attenuate the current feedback information as described in the Inductor DCR Current Sense
section.
Choosing C1 a value for 0.1-
µF, and let R1 and R2 be equal, calculating R1 and R2 with the following
equations:
There is a simplified equation to check if the design will have sub-harmonics or not.
In this design, a 1-
µF capacitor is placed at the CSRT1 pin for the purpose of eliminating noise. It can be
removed without degrading performance.
6.1.5.4 Overcurrent Protection (ILIM1 pin 34)
The resistor selection equations in the CALCULATING OVERCURRENT PROTECTION LEVELsection
are simplified to calculate the over current setting resistors. Set the DC over current rating at 25A.
V
OS is defined as the internal offset, which is typically about 50 mV.
6.1.5.5 VREG (pin 21)
A 4.7-
µF capacitor is connected to VREG pin to filter noise.
6.1.5.6 BP5 (pin 8)
A 4.7
Ω and 1µF capacitor is placed between VREG and BP5.
Submit Documentation Feedback
DESIGN EXAMPLES
45


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