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UC1861-1868 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

Part No. UC1861-1868
Description  Resonant-Mode Power Supply Controllers
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Maker  ETC1 [List of Unclassifed Manufacturers]
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UC1861-1868 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

   
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UC1861-1868
UC2861-2868
UC3861-3868
10/98
FEATURES
• Controls Zero Current Switched (ZCS)
or Zero Voltage Switched (ZVS)
Quasi-Resonant Converters
• Zero-Crossing Terminated One-Shot
Timer
• Precision 1%, Soft-Started 5V
Reference
• Programmable Restart Delay
Following Fault
• Voltage-Controlled Oscillator (VCO)
with Programmable Minimum and
Maximum Frequencies from 10kHz to
1MHz
• Low Start-Up Current (150µA typical)
• Dual 1 Amp Peak FET Drivers
• UVLO Option for Off-Line or DC/DC
Applications
DESCRIPTION
The UC1861-1868 family of ICs is optimized for the control of Zero Cur-
rent Switched and Zero Voltage Switched quasi-resonant converters. Dif-
ferences between members of this device family result from the various
combinations of UVLO thresholds and output options. Additionally, the
one-shot pulse steering logic is configured to program either on-time for
ZCS systems (UC1865-1868), or off-time for ZVS applications (UC1861-
1864).
The primary control blocks implemented include an error amplifier to com-
pensate the overall system loop and to drive a voltage controlled oscillator
(VCO), featuring programmable minimum and maximum frequencies. Trig-
gered by the VCO, the one-shot generates pulses of a programmed maxi-
mum width, which can be modulated by the Zero Detection comparator.
This circuit facilitates “true” zero current or voltage switching over various
line, load, and temperature changes, and is also able to accommodate the
resonant components' initial tolerances.
Under-Voltage Lockout is incorporated to facilitate safe starts upon
power-up. The supply current during the under-voltage lockout period is
typically less than 150
µA, and the outputs are actively forced to the low
state.
(continued)
BLOCK DIAGRAM
Resonant-Mode Power Supply Controllers
UDG-92018
Pin numbers refer to the J and N packages.
Device
1861
1862
1863
1864
1865
1866
1867
1868
UVLO
16.5/10.5
16.5/10.5
36014
36014
16.5/10.5
16.5/10.5
36014
36014
Outputs
Alternating
Parallel
Alternating
Parallel
Alternating
Parallel
Alternating
Parallel
“Fixed”
Off Time
Off Time
Off Time
Off Time
On Time
On Time
On Time
On Time


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