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NBSG111BAEVB Datasheet(PDF) 3 Page - ON Semiconductor

Part # NBSG111BAEVB
Description  Evaluation Board Manual for NBSG111
Download  12 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NBSG111BAEVB Datasheet(HTML) 3 Page - ON Semiconductor

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3
Setup (continued)
Setup Input Signals
Step 3:
3a: Set the signal generator amplitude to 500 mV.
NOTE:
The signal generator amplitude can vary from 75 mV to 900 mV to produce a 400 mV DUT
output.
3b: Set the signal generator offset to 660 mV (the center of a nominal RSECL PECL out-
put).
NOTE:
The VIHCMR (Input High Voltage Common Mode Range) allows the signal generator offset to
vary as long as VIH is within the VIHCMR range. Refer to the device data sheet for further
information.
3c: Set the generator output for a PRBS data signal, or for a square wave clock signal with
a 50% duty cycle.
Connect Output Signals
Step 4:
4a: Connect the outputs of the device (Q0, Q1,
…) to the Oscilloscope. The oscilloscope
sampling head must have internal 50
W termination to ground.
NOTE:
Where a single output is being used, the unconnected output for the pair
must be terminated to
VTT through a 50 W resistor for best operation. Unused pairs may be left unconnected. Since
VTT = 0 V, a standard 50 W SMA termination is recommended.
OUT
Channel 1
Channel 2
OUT
TRIGGER
Channel 3
Channel 4
TRIGGER
Amplitude = 500 mV
Offset = 660 mV
Signal Generator
CLK0
CLK0
VCC = 2.0 V
VCC
VEE
Q0
Q9
Q9
Q0
Digital Oscilloscope
VEE = −1.3 V (3.3 V op)
VTT = 0 V
GND
VTT = 0 V
GND
Channel 8
Channel 7
Channel 6
Channel 5
SEL
EN
EN
SEL
50 W
Figure 3. NBSG111 Board Setup − Time Domain (Single−Ended Mode)
AC_Coupling
NOTE:
All differential cable pairs
must be matched.
Due to simplifcation of the block diagram CLK1/CLK1 and Q1 − Q8 connections are not shown.
VCC
Float
VCC
Float
* Q0 − Q9 Outputs


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