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M306V5ME-XXXSP Datasheet(PDF) 88 Page - Mitsubishi Electric Semiconductor

Part No. M306V5ME-XXXSP
Description  SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
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Maker  MITSUBISHI [Mitsubishi Electric Semiconductor]
Homepage  http://www.mitsubishichips.com
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M306V5ME-XXXSP Datasheet(HTML) 88 Page - Mitsubishi Electric Semiconductor

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M306V5ME-XXXSP
M306V5EESP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
88
Rev. 1.0
2.11 Serial I/O
Serial I/O is configured as 4 unites: UART0, UART2, multi-master I2C-BUS interface 0, and multi-master
I2C-BUS interface 1.
2.11.1 UART0 and UART2
UART0 and UART2 each have an exclusive timer to generate a transfer clock, so they operate indepen-
dently of each other.
Figure 2.11.1 shows the block diagram of UART0 and UART2. Figures 2.11.2 and 2.11.3 show the block
diagram of the transmit/receive unit.
UARTi (i = 0 and 2) has two operation modes: a clock synchronous serial I/O mode and a clock asynchronous
serial I/O mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses 03A016
and 037816) determine whether UARTi is used as a clock synchronous serial I/O or as a UART. Although a
few functions are different, UART0 and UART2 have almost the same functions.
UART0 and UART2 are almost equal in their functions with minor exceptions. UART2, in particular, is
compliant with the SIM interface. It also has the bus collision detection function that generates an interrupt
request if the TxD pin and the RxD pin are different in level.
Table 2.11.1 shows the comparison of functions of UART0 and UART2, and Figures 2.11.4 to 2.11.14
show the registers related to UARTi.
Notes 1: Only when clock synchronous serial I/O mode.
2: Only when clock synchronous serial I/O mode and 8-bit UART mode.
3: Only when UART mode.
4: Using for SIM interface.
UART0
UART2
Function
CLK polarity selection
Continuous receive mode selection
LSB first / MSB first selection
Impossible
Transfer clock output from multiple
pins selection
Impossible
Impossible
Serial data logic switch
Sleep mode selection
Impossible
Impossible
TxD, RxD I/O polarity switch
Possible
CMOS output
TxD, RxD port output format
N-channel open-drain
output
Impossible
Parity error signal output
Impossible
Bus collision detection
Possible
Possible
(Note 1)
Possible
(Note 1)
Possible
(Note 1)
Possible
(Note 3)
Possible
(Note 1)
Possible
(Note 2)
Possible
(Note 1)
Possible
(Note 4)
Possible
(Note 4)
Table 2.11.1 Comparison of functions of UART0 and UART2


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