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IS41LV32256 Datasheet(PDF) 4 Page - Integrated Silicon Solution, Inc

Part No. IS41LV32256
Description  256K x 32 (8-Mbit) EDO DYNAMIC RAM 3.3V, 100/83/66 MHz
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS41LV32256 Datasheet(HTML) 4 Page - Integrated Silicon Solution, Inc

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4
Integrated Silicon Solution, Inc.
Rev. A
09/29/00
IS41LV32256
ISSI®
TRUTH TABLE
Function
RAS CAS0 CAS1 CAS2 CAS3 WE
OE
Address
I/O
Standby
H
HHHH
X
X
X
High-Z
Read: Double Word
L
LLLL
H
L
ROW/COL
DOUT
Read: 1st Byte
L
L
H
H
H
H
L
ROW/COL
I/O0-7=DOUT;
I/O8-31=High-Z
Read: 2nd Byte
L
H
L
H
H
H
L
ROW/COL
I/O0-7=High-Z;
I/O8-15=DOUT;
I/O16-31=High-Z
Read: 3rd Byte
L
H
H
L
H
H
L
ROW/COL
I/O0-15=High-Z;
I/O16-23=DOUT;
I/O24-31=High-Z
Read: 4th Byte
L
H
H
H
L
H
L
ROW/COL
I/O0-23=High-Z;
I/O24-31=DOUT
Write: Double Word (Early)
L
LLLL
L
X
ROW/COL
DIN
Write: 1st Byte (Early)
L
L
H
H
H
L
X
ROW/COL
I/O0-7=DIN;
I/O8-31=X
Write: 2nd Byte (Early)
L
H
L
H
H
L
X
ROW/COL
I/O0-8=X;
I/O8-15=DIN;
I/O16-31=X
Write: 3rd Byte (Early)
L
H
H
L
H
L
X
ROW/COL
I/O0-15=X;
I/O16-23=DIN;
I/O24-31=X
Write: 4th Byte (Early)
L
H
H
H
L
L
X
ROW/COL
I/O0-23=X;
I/O24-31=DIN
Read-Write(1,2)
L
LLLL
H
∅LL∅H
ROW/COL
DOUT
∅DIN
Fast-Page-Mode Read: EDO(2) 1st Cycle:
L
H
∅LH∅LH∅LH∅L
H
L
ROW/COL
DOUT
Subsequent Cycles:
L
H
∅LH∅LH∅LH∅L
H
L
COL
DOUT
Fast-Page-Mode Read: High-Z(2) 1st Cycle:
L
H
∅LH∅LH∅LH∅LH
H
∅L
ROW/COL
DOUT
Subsequent Cycles:
L
H
∅LH∅LH∅LH∅LH
H
∅L
COL
DOUT
Fast-Page-Mode Write: (Early)(1) 1st Cycle:
L
H
∅LH∅LH∅LH∅L
L
X
ROW/COL
DIN
Subsequent Cycles:
L
H
∅LH∅LH∅LH∅L
L
X
COL
DIN
Fast-Page-Mode Read-Write(1,2) 1st Cycle:
L
H
∅LH∅LH∅LH∅LH∅LL∅H
ROW/COL
DOUT
∅DIN
Subsequent Cycles:
L
H
∅LH∅LH∅LH∅LH∅LL∅H
COL
DOUT
∅DIN
Hidden Refresh Read(2)
L
∅H∅L LLLL
H
L
ROW/COL
DOUT
Hidden Refresh Write(1)
L
∅H∅L LLLL
L
X
ROW/COL
DIN
∅High-Z
RAS-Only Refresh
L
HHHH
X
X
ROW
High-Z
CBR Refresh(3)
H
∅L
LLLL
X
X
X
High-Z
Notes:
1. BYTE WRITE may be executed with
CAS0, CAS1, CAS2 or CAS3 active.
2. BYTE READ may be executed with
CAS0, CAS1, CAS2 or CAS3 active.
3. Only one
CAS signal (CAS0, CAS1, CAS2 or CAS3) must be active.


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