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PIC16LV5X Datasheet(PDF) 8 Page - Microchip Technology |
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PIC16LV5X Datasheet(HTML) 8 Page - Microchip Technology |
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8 / 24 page  Enhanced PIC16LV5X DS40121A-page 8 Advanced Information © 1996 Microchip Technology Inc. FIGURE 4-4: PIC16LV58A REGISTER FILE MAP TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on Power-On Reset Value on MCLR and WDT Reset N/A TRIS I/O control registers (TRISA, TRISB, TRISC) 1111 1111 1111 1111 N/A OPTION Contains control bits to configure Timer0 and Timer0/WDT prescaler --11 1111 --11 1111 00h INDF Uses contents of FSR to address data memory (not a physical register) xxxx xxxx uuuu uuuu 01h TMR0 8-bit real-time clock/counter xxxx xxxx uuuu uuuu 02h(1) PCL Low order 8 bits of PC 1111 1111 1111 1111 03h STATUS PA2 PA1 PA0 TO PD ZDC C 0001 1xxx 000q quuu 04h FSR Indirect data memory address pointer 1xxx xxxx 1uuu uuuu 05h PORTA — — — — RA3 RA2 RA1 RA0 ---- xxxx ---- uuuu 06h PORTB RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx uuuu uuuu Legend: Shaded boxes = unimplemented or unused, – = unimplemented, read as '0' (if applicable) x = unknown, u = unchanged, q = value depends on condition. Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.5 of the Enhanced PIC16C5X data sheet (DS30236B) for an explanation of how to access these bits. 2: File address 07h is a general purpose register on the PIC16LV54A and PIC16LV58A. File Address 00h 01h 02h 03h 04h 05h 06h 07h 1Fh INDF(1) TMR0 PCL STATUS FSR PORTA PORTB 0Fh 10h Bank 0 Bank 1 Bank 2 Bank 3 3Fh 30h 20h 2Fh 5Fh 50h 40h 4Fh 7Fh 70h 60h 6Fh General Purpose Registers General Purpose Registers General Purpose Registers General Purpose Registers General Purpose Registers Addresses map back to addresses in Bank 0. Note 1: Not a physical register. FSR<6:5> 00 01 10 11 |
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