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IDT821034 Datasheet(PDF) 3 Page - Integrated Device Technology

Part No. IDT821034
Description  QUAD PCM CODEC WITH PROGRAMMABLE GAIN
Download  19 Pages
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT821034 Datasheet(HTML) 3 Page - Integrated Device Technology

 
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INDUSTRIAL TEMPERATURE RANGE
IDT821034 QUAD PCM CODEC WITH PROGRAMMABLE GAIN
Name
Type
Pin Number
Description
O1_4
O1_3
O1_2
O
35
34
33
SLIC Signaling Output for Channel 1.
O0_4
O0_3
O0_2
O
30
29
28
SLIC Signaling Output for Channel 0.
I/O3_1
I/O3_0
I/O
12
13
SLIC Signaling I/O for Channel 3.
I/O2_1
I/O2_0
I/O
7
8
SLIC Signaling I/O for Channel 2.
I/O1_1
I/O1_0
I/O
32
31
SLIC Signaling I/O for Channel 1.
I/O0_1
I/O0_0
I/O
27
26
SLIC Signaling I/O for Channel 0.
DX
O
14
Transmit PCM Data Output.
PCM data is shifted out of DX on rising edges of BCLK.
VDD
--
15
+5 V Digital Power Supply.
All power supply pins should be connected to the power plane of the circuit board.
DR
I
16
Receive PCM Data Input.
PCM data is shifted into DR on falling edges of BCLK.
TSX
O
17
Time Slot Indicator Output, Open Drain
This pin pulses low during the active time slot of each channel. A low level on this pin indicates active DX
output.
FS
I
18
Frame Synchronization.
The FS pulse serves as the reference to time slots. The width of the FS pulse should be at least one BCLK
cycle.
MCLK
I
19
Master Clock.
Master Clock provides the clock for DSP. It can be 2.048 MHz, 4.096 MHz or 8.192 MHz. It must be
synchronous to FS.
BCLK
I
20
Bit Clock.
Bit Clock shifts out PCM data on DX pin and shifts in PCM data on DR pin. The clock can vary from 512 kHz
to 8.192 MHz at 64 kHz increment, depending on the time slot requirement of the system.
CCLK
I
21
Serial Control Interface Clock.
This is the clock for Serial Control Interface. It can be up to 8.192 MHz.
CO
O
22
Serial Control Interface Data Tri-State Output.
This pin is used to monitor SLIC working status. It is in high impedance state when CS is high.
CI
I
23
Serial Control Interface Data Input.
Data input on this pin can control both CODEC and SLIC.
CS
I
24
Chip Select.
A low level on this pin enables the Serial Control Interface.
GND
--
25
Ground.
All ground pins should be connected to the ground plane of the circuit board.
CNF
O
36
Capacitor For Noise Filter.
This pin should be connected to GNDA via a 0.1 µF capacitor.
PIN DESCRIPTION (CONTINUED)


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