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ADL5370 Datasheet(PDF) 3 Page - Analog Devices

Part No. ADL5370
Description  300 MHz to 1000 MHz Quadrature Modulator
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADL5370 Datasheet(HTML) 3 Page - Analog Devices

 
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ADL5370
Rev. 0 | Page 3 of 20
SPECIFICATIONS
VS = 5 V; TA = 25°C; LO = 0 dBm1 single-ended; baseband I/Q amplitude = 1.4 V p-p differential sine waves in quadrature with a 500 mV
dc bias; baseband I/Q frequency (fBB) = 1 MHz, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
ADL5370
LO = 450 MHz
Operating Frequency Range
Range over which uncompensated sideband suppression < −30 dBc
Low frequency
300
MHz
High frequency
1000
MHz
Output Power
VIQ = 1.4 V p-p differential
6.2
dBm
Output P1 dB
11
dBm
Carrier Feedthrough
−50
dBm
Sideband Suppression
−41
dBc
Quadrature Error
0.76
Degrees
I/Q Amplitude Balance
0.03
dB
Second Harmonic
POUT − (fLO + (2 × fBB)), POUT = 6.2 dBm
−65
dBc
Third Harmonic
POUT − (fLO + (3 × fBB)), POUT = 6.2 dBm
−54
dBc
Output IP2
f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT = −2 dBm per tone
60
dBm
Output IP3
f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT = −2 dBm per tone
24
dBm
Noise Floor
I/Q inputs = 0 V differential with a 500 mV common-mode bias,
20 MHz carrier offset
−160
dBm/Hz
GSM
6 MHz carrier offset, POUT = 6 dBm, PLO = 6 dBm
−157
dBc/Hz
LO INPUTS
LO Drive Level1
Characterization performed at typical level
−7
0
+7
dBm
Input Return Loss
See
Figure 9 for a plot of return loss vs. frequency
6
dB
BASEBAND INPUTS
Pin IBBP, Pin IBBN, Pin QBBP, Pin QBBN
I and Q Input Bias Level
500
mV
Input Bias Current
Current sourcing from each baseband input with a bias of 500 mV dc2
45
μA
Input Offset Current
0.1
μA
Differential Input Impedance
2900
Bandwidth (0.1 dB)
LO = 450 MHz, baseband input = 700 mV p-p sine wave on 500 mV dc
70
MHz
Bandwidth (1 dB)
LO = 450 MHz, baseband input = 700 mV p-p sine wave on 500 mV dc
350
MHz
POWER SUPPLIES
Pin VPS1 and Pin VPS2
Voltage
4.75
5.25
V
Supply Current
205
mA
1 High LO drive reduces noise at a 6 MHz carrier offset in GSM applications.
2 See V-to-I converter discussion in the Circuit Description section for architecture information.


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