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HLX6256 Datasheet(PDF) 3 Page - Honeywell Solid State Electronics Center

Part No. HLX6256
Description  32K x 8 STATIC RAM Low Power SOI
Download  12 Pages
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Maker  HONEYWELL [Honeywell Solid State Electronics Center]
Homepage  http://honeywell.com/Pages/Home.aspx

HLX6256 Datasheet(HTML) 3 Page - Honeywell Solid State Electronics Center

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Total Dose
Transient Dose Rate Upset (3)
Transient Dose Rate Survivability (3)
Soft Error Rate (SER)
Neutron Fluence
Limits (2)
Test Conditions
Total Ionizing Radiation Dose
The SRAM will meet all stated functional and electrical
specifications over the entire operating temperature range
after the specified total ionizing radiation dose. All electrical
and timing performance parameters will remain within
specifications after rebound at VDD = 3.6 V and T =125
extrapolated to ten years of operation. Total dose hardness
is assured by wafer level testing of process monitor transis-
tors and RAM product using 10 keV X-ray and Co60
radiation sources. Transistor gate threshold shift correla-
tions have been made between 10 keV X-rays applied at a
dose rate of 1x105 rad(SiO
2)/min at T = 25°C and gamma
rays (Cobalt 60 source) to ensure that wafer level X-ray
testing is consistent with standard military radiation test
Transient Pulse Ionizing Radiation
The SRAM is capable of writing, reading, and retaining
stored data during and after exposure to a transient
ionizing radiation pulse up to the transient dose rate upset
specification, when applied under recommended operat-
ing conditions. To ensure validity of all specified perfor-
mance parameters before, during, and after radiation
(timing degradation during transient pulse radiation (tim-
ing degradation during transient pulse radiation is
it is suggested that stiffening capacitance be placed on or
near the package VDD and VSS, with a maximum induc-
tance between the package (chip) and stiffening capaci-
tance of 0.7 nH per part. If there are no operate-through
or valid stored data requirements, typical circuit board
mounted de-coupling capacitors are recommended.
(1) Device will not latch up due to any of the specified radiation exposure conditions.
(2) Operating conditions (unless otherwise specified): VDD=3.0 V to 3.6 V, TA=-55
°C to 125°C.
(3) Not guaranteed with 28–Lead DIP.
1 MeV equivalent energy,
Unbiased, TA=25
°C, Adams 10%
worst case environment
Pulse width
≤50 ns, X-ray,
VDD=4.0 V, TA=25
Pulse width
≤1 µs
The SRAM will meet any functional or electrical specifica-
tion after exposure to a radiation pulse of up to the transient
dose rate survivability specification, when applied under
recommended operating conditions. Note that the current
conducted during the pulse by the RAM inputs, outputs and
power supply may significantly exceed the normal operat-
ing levels. The application design must accommodate
these effects.
Neutron Radiation
The SRAM will meet any functional or timing specification
after exposure to the specified neutron fluence under
recommended operating or storage conditions. This as-
sumes an equivalent neutron energy of 1 MeV.
Soft Error Rate
The SRAM is immune to single event upsets (SEU’s) to the
specified soft error rate (SER), under recommended oper-
ating conditions. This hardness level is defined by the
Adams 10% worst case cosmic ray environment for geo-
synchronous orbits.
The SRAM will not latch up due to any of the above
radiation exposure conditions when applied under recom-
mended operating conditions. Fabrication with the SIMOX
substrate material provides oxide isolation between adja-
cent PMOS and NMOS transistors and eliminates any
potential SCR latchup structures. Sufficient transistor
body tie connections to the p- and n-channel substrates
are made to ensure no source/drain snapback occurs.

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