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LP5996 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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LP5996 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 14 page Functional Block Diagram 20171506 Pin Descriptions LLP-10 Package Pin No Symbol Name and Function 1V IN Voltage Supply Input. Connect a 1µF capacitor between this pin and GND. 2 EN1 Enable Input to Regulator 1. Active high input. High = On. Low = OFF. 3 EN2 Enable Input to Regulator 2. Active high input. High = On. Low = OFF. 4C BYP Internal Voltage Reference Bypass. Connect a 10nF capacitor from this pin to GND to reduce noise and improve line transient and PSRR. This pin may be left open. 5 N/C No Connection. Do not connect to any other pin. 6 GND Common Ground pin. Connect externally to exposed pad. 7 N/C No Connection. Do not connect to any other pin. 8 N/C No Connection. Do not connect to any other pin. 9V OUT2 Output of Regulator 2. 300mA maximum current output. Connect a 1µF capacitor between this pin to GND. 10 V OUT1 Output of Regulator 1. 150mA maximum current output. Connect a 1µF capacitor between this pin to GND. Pad GND Common Ground. Connect to Pin 6. www.national.com 2 |
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