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S29GL01GP13TFIV10 Datasheet(PDF) 8 Page - SPANSION

Part # S29GL01GP13TFIV10
Description  3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology
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Manufacturer  SPANSION [SPANSION]
Direct Link  http://www.spansion.com
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S29GL01GP13TFIV10 Datasheet(HTML) 8 Page - SPANSION

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6
S29GL-P MirrorBit
TM Flash Family
S29GL-P_00_A3 November 21, 2006
Data
Sheet
(Adv an ce
Inf o r m a t io n)
2.
Input/Output Descriptions & Logic Symbol
Table 2.1 identifies the input and output package connections provided on the device.
Table 2.1 Input/Output Descriptions
Symbol
Type
Description
A25–A0
Input
Address lines for GL01GP
A24–A0 for GL512P
A23–A0 for GL256P,
A22–A0 for GL128P.
DQ14–DQ0
I/O
Data input/output.
DQ15
I/O
DQ15: Data input/output in word mode .
A-1: LSB address input in byte mode.
CE#
Input
Chip Enable.
OE#
Input
Output Enable.
WE#
Input
Write Enable.
VCC
Supply
Device Power Supply.
VIO
Supply
Versatile IO Input.
VSS
Supply
Ground.
NC
No Connect
Not connected internally.
RY/BY#
Output
Ready/Busy. Indicates whether an Embedded Algorithm is in progress or complete. At
VIL, the device is actively erasing or programming. At High Z, the device is in ready.
BYTE#
Input
Selects data bus width. At VIL, the device is in byte configuration and data I/O pins DQ0-
DQ7 are active. At VIH, the device is in word configuration and data I/O pins DQ0-DQ15
are active.
RESET#
Input
Hardware Reset. Low = device resets and returns to reading array data.
WP#/ACC
Input
Write Protect/Acceleration Input. At VIL, disables program and erase functions in the
outermost sectors. At VHH, accelerates programming; automatically places device in
unlock bypass mode. Should be at VIH for all other conditions.
RFU
Reserved
Reserved for future use.


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