Electronic Components Datasheet Search |
|
S75WS256NDGBAWSJ2 Datasheet(PDF) 6 Page - SPANSION |
|
S75WS256NDGBAWSJ2 Datasheet(HTML) 6 Page - SPANSION |
6 / 10 page 4 S73WS-P based MCP Products S73WS-P_00_A0 March 16, 2006 Data Sheet ( A dva n ce I n f o r m a t i on) 3.2 NOR Flash and DRAM Input/Output Descriptions Amax-A0 = Address inputs, shared between NOR Flash and DRAM DQ15-DQ0 = Data input/output, shared between NOR Flash and DRAM F-CE# = NOR Flash Chip-enable input. Asynchronous relative to CLK for Burst Mode. F-OE# = NOR Flash Output Enable input. Asynchronous relative to CLK for Burst mode. F-WE# = NOR Flash Write Enable input. F-VCC = NOR Flash device power supply (1.7 V - 1.95V). F-VCCQ = Input/Output Buffer power supply. VSS =Ground RFU = Reserved for Future Use F-RDY = Flash ready output. Indicates the status of the Burst read. VOL = data valid. F-CLK = NOR Flash Clock. The first rising edge of CLK in conjunction with AVD# low latches the address input and activates burst mode operation. After the initial word is output, subsequent rising edges of CLK increment the internal address counter. CLK should remain low during asynchronous access. F-AVD# = NOR Flash Address Valid input. Indicates to device that the valid address is present on the address inputs. VIL = for asynchronous mode, indicates valid address; for burst mode, causes starting address to be latched on rising edge of CLK. VIH= device ignores address inputs F-RST# = NOR Flash hardware reset input. VIL= device resets and returns to reading array data F-WP# = NOR Flash hardware write protect input. VIL = disables program and erase functions in the four outermost sectors. F-ACC = NOR Flash accelerated input. At VHH, accelerates programming; automatically places device in unlock bypass mode. At VIL, disables all program and erase functions. Should be at VIH for all other conditions. D-CE# = SDRAM Chip Select D-CKE = SDRAM Clock Enable D-BA1-BA0 = SDRAM Bank Select D-RAS# = SDRAM Row Address Strobe D-CAS# = SDRAM Column Address Strobe D-DM1-D-DM0 = SDRAM Data Input/Output Mask D-WE# = SDRAM Write Enable input D-VSS = SDRAM Ground D-VSSQ = SDRAM Input/Output Buffer ground D-VCCQ = SDRAM Input/Output Buffer power supply D-VCC = SDRAM device power supply |
Similar Part No. - S75WS256NDGBAWSJ2 |
|
Similar Description - S75WS256NDGBAWSJ2 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |