ADS5547 datasheet(22/50 Pages) TI

Part #	ADS5547

Description	14-BIT, 210 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

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ADS5547

SLWS192 – NOVEMBER 2006

PIN CONFIGURATION (CMOS MODE) (continued)

PIN ASSIGNMENTS – CMOS Mode (continued)

NUMBER

PIN NAME

DESCRIPTION

TYPE

NUMBER

OF PINS

This pin functions as serial interface data input when RESET is low. It functions as

STANDBY control pin when RESET is tied high.

SDATA

I

28

1

See Table 4 for detailed information.

The pin has an internal 100 k

Ω pull-down resistor.

This pin functions as serial interface enable input when RESET is low. It functions

as CLKOUT edge programmability when RESET is tied high. See Table 5 for

SEN

I

27

1

detailed information.

The pin has an internal 100-k

Ω pull-up resistor to DRVDD.

Output buffer enable input, active high. The pin has an internal 100-k

Ω pull-up

OE

I

7

1

resistor to DRVDD.

Data Format Select input. This pin sets the DATA FORMAT (Twos complement or

DFS

Offset binary) and the LVDS/CMOS output mode type. See Table 6 for detailed

I

6

1

information.

Mode select input. This pin selects the internal or external reference mode. See

MODE

I

23

1

Table 7 for detailed information.

CLKOUT

CMOS output clock

O

5

1

D0

CMOS output data D0

O

33

1

D0

CMOS output data D1

O

34

1

D2

CMOS output data D2

O

37

1

D2

CMOS output data D3

O

38

1

D4

CMOS output data D4

O

39

1

D4

CMOS output data D5

O

40

1

D6

CMOS output data D6

O

41

1

D7

CMOS output data D7

O

42

1

D8

CMOS output data D8

O

43

1

D9

CMOS output data D9

O

44

1

D10

CMOS output data D10

O

45

1

D11

CMOS output data D11

O

46

1

D12

CMOS output data D12

O

47

1

D13

CMOS output data D13

O

48

1

OVR

Out-of-range indicator, CMOS level signal

O

3

1

DRVDD

Digital and output buffer supply

I

2, 35

2

DRGND

Digital and output buffer ground

I

1, 36

2

UNUSED

Unused pin in CMOS mode

4

1

NC

Do not connect

31, 32

2

22

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