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S71NS064NC0BJWRN2 Datasheet(PDF) 6 Page - SPANSION |
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S71NS064NC0BJWRN2 Datasheet(HTML) 6 Page - SPANSION |
6 / 12 page 4 S71NS-N MCP Products S71NS-N_00_A3 October 10, 2006 Ad van c e Inf o rmation 3 MCP Block Diagram Figure 3.1 MCP Block Diagram Note: The CLK and WAIT signals on the pSRAM are not present on the pSRAM Type 2; therefore, for those MCP's, those signals will only be connected to the NS flash, but not to the pSRAM. Also, on this pSRAM, the CRE signal will not be present at all. F-RST# RST# F-ACC ACC F-WP# WP# RDY RDY/ WAIT F-CE # CE# OE# OE# WE# WE# AD15-AD0 AD15-AD0 AVD # AVD # CLK CLK Amax-A16 Amax-A16 CRE UB # LB# WAIT R-CE# CE # OE# WE# AD15-AD0 AVD # CLK Amax-A16 NS pSRAM R-CRE R-UB # R-LB # |
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