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AM29PDS322D Datasheet(PDF) 5 Page - SPANSION

Part No. AM29PDS322D
Description  32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only (1.8 V to 2.2 V) Simultaneous Read/Write Page-Mode Boot Sector Flash Memory
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Maker  SPANSION [SPANSION]
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AM29PDS322D Datasheet(HTML) 5 Page - SPANSION

 
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December 4, 2006 23569A5
Am29PDS322D
3
D A TA
SH EET
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Special Handling Instructions for FBGA Package .................... 5
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 8
Table 1. Am29PDS322D Device Bus Operations .............................8
Requirements for Reading Array Data ..................................... 8
Read Mode ............................................................................... 8
Random Read (Non-Page Mode Read) ............................................8
Page Mode Read ...................................................................... 9
Table 2. Page Word Mode ................................................................9
Writing Commands/Command Sequences .............................. 9
Accelerated Program Operation ........................................................9
Autoselect Functions .........................................................................9
Simultaneous Read/Write Operations with Zero Latency ......... 9
Standby Mode .......................................................................... 9
Automatic Sleep Mode ........................................................... 10
RESET#: Hardware Reset Pin ............................................... 10
Output Disable Mode .............................................................. 10
Table 3. Am29PDS322DT Top Boot Sector Addresses ..................11
Table 4. Am29PDS322DT Top Boot SecSi Sector Address ...........12
Table 5. Am29PDS322DB Bottom Boot Sector Addresses ............12
Table 6. Am29PDS322DB Bottom Boot SecSi Sector Address . . .14
Autoselect Mode..................................................................... 15
Table 7. Autoselect Codes (High Voltage Method) ........................15
Sector/Sector Block Protection and Unprotection .................. 16
Table 8. Top Boot Sector/Sector Block Addresses for
Protection/Unprotection ...................................................................16
Table 9. Bottom Boot Sector/Sector Block Addresses for
Protection/Unprotection ...................................................................16
Write Protect (WP#) ................................................................ 17
Temporary Sector/Sector Block Unprotect ............................. 17
Figure 1. Temporary Sector Unprotect Operation........................... 17
Figure 2. Temporary Sector Group Unprotect Operation................ 18
Figure 3. In-System Sector Group Protect/Unprotect Algorithms ... 19
SecSi (Secured Silicon) Sector Flash Memory Region .......... 20
Factory Locked: SecSi Sector Programmed and Protected
at the Factory ..................................................................................20
Hardware Data Protection ...................................................... 20
Low V
CC Write Inhibit .......................................................................20
Write Pulse “Glitch” Protection ........................................................21
Logical Inhibit ..................................................................................21
Power-Up Write Inhibit ....................................................................21
Command Definitions . . . . . . . . . . . . . . . . . . . . . 21
Reading Array Data ................................................................ 21
Reset Command ..................................................................... 21
Autoselect Command Sequence ............................................ 21
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 22
Word Program Command Sequence ..................................... 22
Unlock Bypass Command Sequence ..............................................22
Chip Erase Command Sequence ........................................... 22
Figure 4. Unlock Bypass Algorithm ................................................. 23
Figure 5. Program Operation .......................................................... 23
Sector Erase Command Sequence ........................................ 24
Erase Suspend/Erase Resume Commands ........................... 24
Figure 6. Erase Operation.............................................................. 25
Am29PDS322D Command Definitions . . . . . . . . 26
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 27
DQ7: Data# Polling ................................................................. 27
Figure 7. Data# Polling Algorithm .................................................. 27
RY/BY#: Ready/Busy#............................................................ 28
DQ6: Toggle Bit I .................................................................... 28
Figure 8. Toggle Bit Algorithm........................................................ 28
DQ2: Toggle Bit II ................................................................... 29
Reading Toggle Bits DQ6/DQ2 ............................................... 29
DQ5: Exceeded Timing Limits ................................................ 29
DQ3: Sector Erase Timer ....................................................... 29
Table 11. Write Operation Status ................................................... 30
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 31
Figure 9. Maximum Negative Overshoot Waveform ...................... 31
Figure 10. Maximum Positive Overshoot Waveform...................... 31
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 31
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 11. I
CC1 Current vs. Time (Showing Active and Automatic
Sleep Currents) .............................................................................. 33
Figure 12. Typical ICC1 vs. Frequency............................................ 33
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 13. Test Setup.................................................................... 34
Table 12. Test Specifications ......................................................... 34
Key to Switching Waveforms. . . . . . . . . . . . . . . . 34
Figure 14. Input Waveforms and Measurement Levels ................. 34
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 15. Conventional Read Operation Timings ......................... 35
Figure 16. Page Mode Read Timings ............................................ 36
Hardware Reset (RESET#) .................................................... 37
Figure 17. Reset Timings ............................................................... 37
Erase and Program Operations .............................................. 38
Figure 18. Program Operation Timings.......................................... 39
Figure 19. Accelerated Program Timing Diagram.......................... 39
Figure 20. Chip/Sector Erase Operation Timings .......................... 40
Figure 21. Back-to-back Read/Write Cycle Timings ...................... 41
Figure 22. Data# Polling Timings (During Embedded Algorithms). 41
Figure 23. Toggle Bit Timings (During Embedded Algorithms)...... 42
Figure 24. DQ2 vs. DQ6................................................................. 42
Temporary Sector Unprotect .................................................. 43
Figure 25. Temporary Sector Group Unprotect Timing Diagram ... 43
Figure 26. Sector Group Protect and Unprotect Timing Diagram .. 44
Alternate CE# Controlled Erase and Program Operations ..... 45
Figure 27. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 46
Erase And Programming Performance. . . . . . . . 47
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 47
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 48
FBD048—48-Ball Fine-Pitch Ball Grid Array (FBGA)
6 x 12 mm package ................................................................ 48
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 49


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