Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF HTML

NTB35N15 Datasheet(PDF) 5 Page - ON Semiconductor

Part No. NTB35N15
Description  Power MOSFET 37 Amps, 150 Volts N-Channel Enhancement-Mode D2PAK
Download  12 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  ONSEMI [ON Semiconductor]
Homepage  http://www.onsemi.com
Logo 

NTB35N15 Datasheet(HTML) 5 Page - ON Semiconductor

 
Zoom Inzoom in Zoom Outzoom out
 5 / 12 page
background image
NTB35N15
http://onsemi.com
5
40
0
1
0.2
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
RG, GATE RESISTANCE (OHMS)
1
10
100
1000
10
VDD = 75 V
ID = 37 A
VGS = 10 V
VGS = 0 V
TJ = 25°C
Figure 10. Diode Forward Voltage versus Current
120
100
80
60
40
20
0
10
6
2
0
QG, TOTAL GATE CHARGE (nC)
12
8
4
20
70
40
0
100
10
50
30
60
0.3
0.4
0.5
0.6
0.7
0.8
0.9
10
20
30
5
15
25
35
ID = 37 A
TJ = 25°C
VGS
Q2
Q1
QT
VDS
tr
td(off)
td(on)
tf
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance –
General Data and Its Use.”
Switching between the off–state and the on–state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded and the
transition time (tr,tf) do not exceed 10
ms. In addition the total
power averaged over a complete switching cycle must not
exceed (TJ(MAX) – TC)/(RqJC).
A Power MOSFET designated E–FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and adjusted for operating conditions
differing from those specified. Although industry practice is
to rate in terms of energy, avalanche energy capability is not
a constant. The energy rating decreases non–linearly with an
increase of peak current in avalanche and peak junction
temperature.
Although many E–FETs can withstand the stress of
drain–to–source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry custom.
The energy rating must be derated for temperature as shown
in the accompanying graph (Figure 12). Maximum energy at
currents below rated continuous ID can safely be assumed to
equal the values indicated.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn