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DSM2180F3V15K6 Datasheet(PDF) 7 Page - STMicroelectronics |
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DSM2180F3V15K6 Datasheet(HTML) 7 Page - STMicroelectronics |
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7 / 63 page  7/63 DSM2180F3V ARCHITECTURAL OVERVIEW Major functional blocks are shown in Figure 5. DSP Address/Data/Control Interface These DSP signals attach directly to the DSM in- puts for a glueless connection. An 8-bit data con- nection is formed and all 22 DSP address lines can be decoded while the DSP operates in full memory mode. DSP memory strobes; BMS, DMS, and IOMS are used for BDMA, data, & I/O access respectively (no program memory access, PMS). Flash Memory The 1 Mbit (128K x 8) Flash memory is divided into eight equally-sized 16K byte sectors that are indi- vidually selectable through the Decode PLD. Each Flash memory sector can be located at any ad- dress as defined by the user with PSDsoft Ex- press. The flexibility of the Decode PLD and Page Register logic allow the DSP to access Flash memory as Byte DMA (BDMA) or as external data overlay memory across several memory pages. BDMA transfers are good for initial bootloading and for loading internal overlay memory at runt- ime, but BDMA is not efficient writing to Flash memory because Flash memory is unlocked, writ- ten, and status is checked one byte at a time, re- quiring an initialization of the BDMA channel for each and every byte transfer. The DSM device al- lows the DSP to alternatively access Flash memo- ry as data overlay memory (using DMS instead of BMS ). Writing Flash memory this way is faster and requires simpler code. Note: During a DSP data access using the DMS strobe, only the upper byte of a 16-bit DSP data word is used. DSM Flash memory sector size of 16K bytes matches the DSP external Data Memory Overlay window size of 16K locations (two 8K windows when DMOVLAY register is used, see Analog De- vices ADSP-218X data sheets). This alignment provides convenient data management. Also, each 16K byte sector can be loaded with contents from different firmware or data files specified in PSDsoft ExpressTM. Miscellaneous: The DSP can erase Flash memory by individual sectors or the entire Flash memory array may be erased at one time. The Flash mem- ory automatically goes to standby between DSP read or write accesses to conserve power. Maxi- mum access times include sector decoding time. Maximum erase cycles is 100K and data retention is 15 years minimum. Flash memory, as well as the entire DSM device may be programmed with the JTAG ISP interface with no DSP involvement. |
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