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MC145193 Datasheet(PDF) 7 Page - Motorola, Inc |
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MC145193 Datasheet(HTML) 7 Page - Motorola, Inc |
7 / 24 page MC145193 7 MOTOROLA WIRELESS SEMICONDUCTOR SOLUTIONS – RF AND IF DEVICE DATA LOOP SPECIFICATIONS (VDD = VCC = 2.7 to 5.5 V unless otherwise indicated, TA = –40 to 85°C) Fig. Guaranteed Operating Range Parameter Test Condition Fig. No. Symbol Min Max Unit Input Sensitivity Range, fin 100 MHz ≤ fin ≤ 1100 MHz 7 Pin – 10 4 dBm* Input Frequency, REFin Externally Driven in Reference Mode Vin ≥ 400 mVpp 2.7 ≤ VDD < 4.5 V 4.5 ≤ VDD ≤ 5.5 V 8 fref 1.5 1.5 20 30 MHz Crystal Frequency, Crystal Mode C1 ≤ 30 pF, C2 ≤ 30 pF, Includes Stray Capacitance 9 fXTAL 2 15 MHz Output Frequency, REFout CL = 20 pF, Vout ≥ 1 Vpp 10, 12 fout dc 10 MHz Operating Frequency of the Phase Detectors f φ dc 2 MHz Output Pulse Width ( φR, φV, and LD) fR in Phase with fV, CL = 20 pF, φR and φV active for LD measurement, ** VPD = 2.7 to 5.5 V VDD = 2.7 V VDD = 4.5 V VDD = 5.5 V 11, 12 tw 40 18 14 120 60 50 ns Output Transition Times (LD, φV, and φR) CL = 20 pF, VPD = 2.7 V, VDD = VCC = 2.7 V 11, 12 tTLH, tTHL — 80 ns Input Capacitance, REFin Cin — 7 pF * Power level at the input to the dc block. ** When PDout is active, LD minimum pulse width is approximately 5 ns. Figure 7. Test Circuit Sine Wave Generator 50 Ω Device Under Test 0.01 µF Test Point VCC VDD REFin Gnd Output A Vin Figure 8. Test Circuit — Reference Mode (fR) Test Point REFout V+ Device Under Test C1 Test Point VCC VDD Output A Gnd REFin REFout C2 Figure 9. Test Circuit — Crystal Mode (fR) V+ 50% REFout 1 / f REFout Figure 10. Switching Waveform 10% 90% Output tTLH tTHL Figure 11. Switching Waveform 50% tw Figure 12. Test Circuit DC Block 50 Ω PAD Sine Wave Generator 50 Ω VCC VDD Gnd V+ Test Point Output A (fV) Device Under Test fin fin NOTE: Alternately, the 50 Ω pad may be a T network. Test Point Device Under Test CL* * Includes all probe and fixture capacitance. |
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