PI74FCT162244MT

16-BIT HEAVY BUFFER/LINE DRIVER

6

PS2043A 03/12/96

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Application Note

Almost all propagation delay specifications in standard data

books are specified for one single bit switching, not multiple-bit

increases very significantly for all 16 bits switching simulta-

neously, as compared with one single bit switching.

For realistic heavy load applications such as DRAM modules and

per JEDEC DRAM module specification, the driver propagation

delay should be specified for all 16 bits switching worst case. The

specification for one single bit switching in standard data books

has no useful meaning.

The following PI74FCT162244MT test data are tested under

150 pF heavy loads and all 16 bits switching simultaneously:

Figure 1. Vertical voltage scale is 1.0V/div. Reference voltage level y2 at the middle is 1.5V. Horizontal

time scale is 1.0 ns/div. For PI74FCT162244MT with 150 pF loads, all 16 bits switching, the