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TMS55160 Datasheet(PDF) 42 Page - Texas Instruments |
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TMS55160 Datasheet(HTML) 42 Page - Texas Instruments |
42 / 67 page TMS55160, TMS55161, TMS55170, TMS55171 262144 BY 16-BIT MULTIPORT VIDEO RAMS SMVS464 – MARCH1996 42 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 PARAMETER MEASUREMENT INFORMATION RAS CASx A0 – A8 WE DSF TRG DQ0 – DQ15 tc(W) tw(RL) tw(RH) td(RLCH) tt td(CLRH) tw(CL) td(RLCL) td(CHRL) th(RA) tt th(RLCA) tsu(CA) tsu(RA) th(CLCA) tw(CH) 1 23 th(SFR) tsu(SFR) tsu(SFC) th(SFC) tsu(TRG) tsu(WMR) tsu(WCH) tsu(WRH) th(RLW) th(CLW) tsu(WCL) th(RWM) tsu(DQR) tsu(DCL)† tw(WL) th(CLD)† th(RLD) Row Column td(CHRL) td(CARH) td(RLCA) th(RSF) th(TRG) td(CACH) th(RDQ) † In early-write operations, DQ0 – DQ15 are all latched on the first falling edge of CASx. Thus, tsu(DCL) and th(CLD) are referenced only to the first falling edge of CASx. Figure 33. Early-Write-Cycle Timing Table 7. Early-Write-Cycle State Table CYCLE STATE CYCLE 1 2 3 Write operation (nonmasked) H Don’t care Valid data Write operation with nonpersistent write-per-bit L Write mask Valid data Write operation with persistent write-per-bit L Don’t care Valid data |
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