TLF10384

February 1991

(FDDI Clock Recovery Device)

General Description

The DP83231 CRD device is a clock recovery device that

has been designed for use in 100 Mbps FDDI (Fiber Distrib-

uted Data Interface) networks The device receives serial

data from a Fiber Optic Receiver in differential ECL NRZI

4B5B group code format and outputs resynchronized NRZI

received data and a 125 MHz received clock in differential

Features

Y

Clock recovery at 100 Mbps data rate

Y

Internal 250 MHz VCO

01% VCO operating range

Crystal controlled

Y

Precision window centering delay line

Y

Y

28-pin PLCC package

Y

BiCMOS processing

TLF10384 – 1

FIGURE 1-1 FDDI Chip Set Block Diagram

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A