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MB90F394H Datasheet(PDF) 29 Page - Fujitsu Component Limited. |
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MB90F394H Datasheet(HTML) 29 Page - Fujitsu Component Limited. |
29 / 61 page MB90390 Series 29 (Continued) Address Register Abbrevia- tion Access Resource name Initial value 35ABH I2C Clock Control Register ICCR R/W I2C Interface X0011111 35ACH to 35BFH Reserved 35C0H Parameter Register Low Byte CMPRL R/W Clock Modulator 11111101 35C1H Parameter Register High Byte CMPRH R/W XX000010 35C2H Clock Modulator Control Register CMCR R/W 00010000 35C3H to 35C8H Reserved 35C9H Input Capture Edge 0/1 ICE01 R/W Input Capture 0/1 XXXXX0XX 35CAH Input Capture Edge 2/3 ICE23 R Input Capture 2/3 XXXXXXXX 35CBH Input Capture Edge 4/5 ICE45 R/W Input Capture 4/5 XXXXX0XX 35CCH to 35DFH Reserved 35E0H Detection Address Setting Register 0 (Low-order) PADR0 R/W Address Maching Detection Function 0 XXXXXXXX 35E1H Detection Address Setting Register 0 (Middle-order) PADR0 R/W XXXXXXXX 35E2H Detection Address Setting Register 0 (High-order) PADR0 R/W XXXXXXXX 35E3H Detection Address Setting Register 1 (Low-order) PADR1 R/W XXXXXXXX 35E4H Detection Address Setting Register 1 (Middle-order) PADR1 R/W XXXXXXXX 35E5H Detection Address Setting Register 1 (High-order) PADR1 R/W XXXXXXXX 35E6H to 35EFH Reserved 35F0H Detection Address Setting Register 3 (Low-order) PADR3 R/W Address Maching Detection Function 1 XXXXXXXX 35F1H Detection Address Setting Register 3 (Middle-order) PADR3 R/W XXXXXXXX 35F2H Detection Address Setting Register 3 (High-order) PADR3 R/W XXXXXXXX 35F3H Detection Address Setting Register 4 (Low-order) PADR4 R/W XXXXXXXX 35F4H Detection Address Setting Register 4 (Middle-order) PADR4 R/W XXXXXXXX 35F5H Detection Address Setting Register 4 (High-order) PADR4 R/W XXXXXXXX |
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