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ENH050Q1-XXX Datasheet(PDF) 2 Page - White Electronic Designs Corporation

Part # ENH050Q1-XXX
Description  Color TFT-LCD Module Features GENERAL DESCRIPTION
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Manufacturer  WEDC [White Electronic Designs Corporation]
Direct Link  http://www.whiteedc.com
Logo WEDC - White Electronic Designs Corporation

ENH050Q1-XXX Datasheet(HTML) 2 Page - White Electronic Designs Corporation

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ENH050Q1-320/450/600
Original specifications created by Sharp.
2
Display Systems Division • Hillsboro, OR • (503) 690-2460 • www.wedc.com
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2003
Rev. 0
White Electronic Designs
Display Systems Division
TTL-LCD Panel Driving Section
(Hi means digital input voltage, Lo means GND.)
Pin No.
Symbol
I/O
Description
Remarks
1
HSY
I, O
Input/Output horizontal sync. signal (low active)
(1)
2
VSY
I, O
Input/Output vertical sync. signal (low active)
(2)
3
PWM
O
Terminal for output PWM of dimming back light
(3)
4
NTP
I
Terminal for display mode change of NTSC and PAL
(4)
5
HRV
I
Turning the direction of horizontal scanning
(5)
6
VRV
I
Turning the direction of vertical scanning
(6)
7
VSW
I
Selection signal of two sets of video signals
(7)
8
SAM
I
Terminal for sampling mode change
(8)
9VCDC
I
DC bias voltage adjusting terminal of common electrode driving signal
(9)
10
VSH
I
Positive power supply voltage
11
VBS
I
Composite video signal of sync. seperator
(10)
12
BRT
I
Brightness adjusting terminal
(11)
13
VR1
I
Color video signal (Red) 1
Positive
(On when VSW=Hi.)
14
VG1
I
Color video signal (Green) 1
15
VB1
I
Color video signal (Blue) 1
16
VSL
I
Negative power supply voltage
17
VR2
I
Color video signal (Red) 2
Positive
(On when VSW=Lo.)
18
VG2
I
Color video signal (Green) 2
19
VB2
I
Color video signal (Blue) 2
20
GND
I
Ground
21
CKC
I
Change the input/output direction of CK, HSY and VSY.
(12)
22
CK
I, O
Input/Output clock signal
(13)
INPUT TERMINALS AND THEIR DESCRIPTIONS
Note:
1.
If CKC='Hi', this terminal outputs horizontal sync. signal in phase with VBS.
If CKC='Lo', this terminal will be external horizontal sync. input terminal.
2.
If CKC='Hi', this terminal outputs vertical sync. signal in phase with VBS.
If CKC='Lo', this terminal will be external vertical sync. input terminal.
3.
PWM signal is used for the PWM dimming frequency and it is easy to get PWM signal dimming by combining both HSY and PWM signals. But use this PWM signal in case of
input standard NTSC or PAL signal.
4.
This terminal is to switch the display mode, and it is NTSC mode when NTP is 'High' and is PAL mode when NTP is 'Low'.
5.
When this terminal is 'High', it will be normal and when it is 'Low', it will display reversely on the horizontal direction.
6.
When this terminal is 'High', it will be normal and when it is 'Low', it will display reversely on the vertical direction.
7.
This terminal is to switch input for groups of RGB color video signals, and Input 1 (No. 13 to 15) is selected when VSW is 'High' and Input 2 (No. 17 to 19) is selected when VSW
is 'Low'.
8.
This terminal switches to sampling mode. It is the independent data-sampling timing at RGB dot when SAM is 'High' and it is the simultaneous data-sampling timing at RGB dots
when SAM is 'Low'.
9.
This terminal is applicable to the DC bias voltage adjusting terminal of the common electrode driving signal. If power supply voltage is typical, it is not necessary to re-adjust it.
So, Use it in the open condition. However, in the case that the power supply voltage is changed, or power supply voltage is reduced, adjust it externally to get the best contrast
with a resistor that is added to this terminal, or semi-fixed resistor, VCDC in module. A recommended circuit is shown in Fig. 5.
10.
The sync. signal which will be input, is negative polarity and is applicable to standard composite sync. signal, negative one in the same pulse level.
11.
DC voltage supplied to this terminal, makes the brightness of the screen adjustable, which is the black level of the video signal. Although this is adjusted in the time of delivery to
get the best display in the condition of the open terminal, it is also able to be re-adjusted externally with a resistor that can be added to this terminal, or a semi-fixed resistor, BRT,
in module. A recommended circuit is shown in Fig. 5.
12.
CKC-'Hi', CK.HSY.VSY terminals are output mode. CKC='Lo': CK. HSY. VSY terminals are input mode.
13.
If CKC='Hi', this terminal outputs the clock for sure drivers. If CKC='Lo', this terminal will be the external clock input terminal.


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