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PIC24FJ96GA008 Datasheet(PDF) 3 Page - Microchip Technology |
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PIC24FJ96GA008 Datasheet(HTML) 3 Page - Microchip Technology |
3 / 232 page © 2006 Microchip Technology Inc. Preliminary DS39747C-page 1 PIC24FJ128GA FAMILY High-Performance CPU: • Modified Harvard Architecture • Up to 16 MIPS operation @ 32 MHz • 8 MHz internal oscillator: - 4x PLL option - Multiple divide options • 17-bit x 17-bit Single-Cycle Hardware Fractional/Integer Multiplier • 32-bit by 16-bit Hardware Divider • 16 x 16-bit Working Register Array • C compiler Optimized Instruction Set Architecture: - 76 base instructions - Flexible addressing modes • Linear Program Memory Addressing up to 12 Mbytes • Linear Data Memory Addressing up to 64 Kbytes • Two Address Generation Units for separate Read and Write Addressing of Data Memory Special Microcontroller Features: • Operating Voltage Range of 2.0V to 3.6V • Flash Program Memory: - 1000 erase/write cycles, typical - Flash retention 20 years, typical • Self-Reprogrammable under Software Control • Selectable Power Management modes: - Sleep, Idle and Alternate Clock modes • Fail-Safe Clock Monitor operation: - Detects clock failure and switches to on-chip, low-power RC oscillator • On-Chip LDO Regulator • JTAG Boundary Scan and Programming Support • Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Flexible Watchdog Timer (WDT) with On-Chip, Low-Power RC Oscillator for reliable operation • In-Circuit Serial Programming™ (ICSP™) and In-Circuit Emulation (ICE) via 2 pins Analog Features: • 10-bit, up to 16-channel Analog-to-Digital Converter (A/D): - 500 ksps conversion rate - Conversion available during Sleep and Idle • Dual Analog Comparators with Programmable Input/Output Configuration Peripheral Features: • Two 3-wire/4-wire SPI modules, supporting 4 Frame modes with 4-level FIFO Buffer •Two I2C™ modules support Multi-Master/Slave mode and 7-bit/10-bit Addressing • Two UART modules: - Supports RS-232, RS-485 and LIN 1.2 - Supports IrDA® with on-chip hardware endec - Auto-Wake-up on Start bit - Auto-Baud Detect - 4-level FIFO buffer • Parallel Master Slave Port (PMP/PSP): - Supports 8-bit or 16-bit data - Supports 16 address lines • Hardware Real-Time Clock/Calendar (RTCC): - Provides clock, calendar and alarm functions • Five 16-bit Timers/Counters with Programmable prescaler • Five 16-bit Capture Inputs • Five 16-bit Compare/PWM Outputs • High-Current Sink/Source on select I/O pins: 18 mA/18 mA • Configurable Open-Drain Output on Digital I/O pins • Up to 5 External Interrupt Sources Device Pins Program Memory (Bytes) SRAM (Bytes) Timers 16-bit SPI I2C™ 10-bit A/D (ch) PIC24FJ64GA006 64 64K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ96GA006 64 96K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ128GA006 64 128K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ64GA008 80 64K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ96GA008 80 96K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ128GA008 80 128K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ64GA010 100 64K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ96GA010 100 96K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ128GA010 100 128K 8K 5 5 5 2 2 2 16 2 Y Y General Purpose, 16-bit Flash Microcontrollers |
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