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MM74HCT273 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. MM74HCT273
Description  Octal D-Type Flip-Flop with Clear
Download  8 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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MM74HCT273 Datasheet(HTML) 4 Page - Fairchild Semiconductor

   
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4
AC Electrical Characteristics
VCC
5V, TA 25qC, CL 15 pF, tr tf 6 ns
AC Electrical Characteristics
VCC
5.0V
r 10%, CL 50 pF, tr tf 6 ns unless otherwise specified
Note 5: CPD determines the no load dynamic power consumption, PD CPD VCC
2 f  I
CC VCC, and the no load dynamic current consumption,
IS CPD VCC
2 f  I
CC.
Symbol
Parameter
Conditions
Typ
Guaranteed
Units
Limits
fMAX
Maximum Operating Frequency
68
30
MHz
tPHL, tPLH
Maximum Propagation Delay from Clock to Q
18
30
ns
tPHL, tPLH
Maximum Propagation Delay from Clear to Q
21
30
ns
tREM
Minimum Removal Time, Clear to Clock
15
ns
tS
Minimum Set-Up Time D to Clock
6
20
ns
tH
Minimum Hold Time Clock to D
35
ns
tW
Minimum Pulse Width Clock or Clear
10
16
ns
Symbol
Parameter
Conditions
TA 25qCTA 40qC to 85qCTA 55qC to 125qCUnits
Typ
Guaranteed Limits
fMAX
Maximum Operating
68
27
21
18
MHz
Frequency
tPHL, tPLH Maximum Propagation
22
37
46
56
ns
Delay from Clock to Q
tPHL, tPLH Maximum Propagation
25
35
44
52
ns
Delay from Clear to Q
tREM
Minimum Removal
15
6
7
ns
Time Clear to Clock
tS
Minimum Set-Up Time
6
20
25
30
ns
D to Clock
tH
Minimum Hold Time
35
5
5
ns
Clock to D
tW
Minimum Pulse Width
10
16
25
30
ns
Clock or Clear
tr, tf
Maximum Input Rise
500
500
500
ns
and Fall Time, Clock
tTHL, tTLH Maximum Output Rise
11
15
19
22
ns
and Fall Time
CPD
Power Dissipation
(Per Flip-Flop)
50
pF
Capacitance (Note 5)
CIN
Maximum Input
6
10
10
10
pF
Capacitance


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