ADSP-21020KG-133 datasheet(6/32 Pages) AD

Part #	ADSP-21020KG-133

Description	32/40-Bit IEEE Floating-Point DSP Microprocessor

Download	32 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

Logo

6 / 32 page

ADSP-21020

REV. C

–6–

Name

Type

Function

DMPAGE

O

Data Memory Page Boundary. The ADSP-

21020 asserts this pin to signal that a data

memory page boundary has been crossed.

Memory pages must be defined in the

memory control registers.

DMTS

I/S

Data Memory Three-State Control. DMTS

places the data memory address, data,

selects, and strobes in a high-impedance

state. If DMTS is asserted while a DM

access is occurring, the processor will halt

and the memory access will not be

completed. DMACK must be asserted for

at least one cycle when DMTS is

deasserted to allow any pending memory

access to complete properly. DMTS should

only be asserted (low) during an active

memory access cycle.

CLKIIN

I

External clock input to the ADSP-21020.

The instruction cycle rate is equal to

CLKIN. CLKIN may not be halted,

changed, or operated below the specified

frequency.

RESET

I/A

Sets the ADSP-21020 to a known state and

begins execution at the program memory

location specified by the hardware reset

vector (address). This input must be

asserted (low) at power-up.

IRQ3–0

I/A

Interrupt request lines; may be either edge

triggered or level-sensitive.

FLAG3–0

I/O/A External Flags. Each is configured via

control bits as either an input or output. As

an input, it can be tested as a condition. As

an output, it can be used to signal external

peripherals.

BR

I/A

Bus Request. Used by an external device to

request control of the memory interface.

When BR is asserted, the processor halts

execution after completion of the current

cycle, places all memory data, addresses,

selects, and strobes in a high-impedance

state, and asserts BG. The processor

continues normal operation when BR is

released.

BG

O

Bus Grant. Acknowledges a bus request

(BR), indicating that the external device

may take control of the memory interface.

BG

is asserted (held low) until BR is

released.

TIMEXP

O

Timer Expired. Asserted for four cycles

when the value of TCOUNT is

decremented to zero.

RCOMP

Compensation Resistor input. Controls

compensated output buffers. Connect

RCOMP through a 1.8 k

Ω ±15% resistor

to EVDD. Use of a capacitor (approxi-

mately 100 pF), placed in parallel with the

1.8 k

Ω resistor is recommended.

EVDD

P

Power supply (for output drivers),

nominally +5 V dc (10 pins).

EGND

G

Power supply return (for output drivers);

(16 pins).

Name

Type

Function

IVDD

P

Power supply (for internal circuitry),

nominally +5 V dc (4 pins).

IGND

G

Power supply return (for internal circuitry); (7

pins).

TCK

I

Test Clock. Provides an asynchronous clock

for JTAG boundary scan.

TMS

I/S

Test Mode Select. Used to control the test

state machine. TMS has a 20 k

Ω internal

pullup resistor.

TDI

VS

Test Data Input. Provides serial data for the

boundary scan logic. TDI has a 20 k

Ω internal

pullup resistor.

TDO

O

Test Data Output. Serial scan output of the

boundary scan path.

TRST

I/A

Test Reset. Resets the test state machine.

TRST

must be asserted (pulsed low) after

power-up or held low for proper operation of

the ADSP-21020. TRST has a 20 k

Ω internal

pullup resistor.

NC

No Connect. No Connects are reserved pins

that must be left open and unconnected.

INSTRUCTION SET SUMMARY

The ADSP-21020 instruction set provides a wide variety of

programming capabilities. Every instruction assembles into a

single word and can execute in a single processor cycle.

Multifunction instructions enable simultaneous multiplier and

ALU operations, as well as computations executed in parallel

with data transfers. The addressing power of the ADSP-21020

gives you flexibility in moving data both internally and

externally. The ADSP-21020 assembly language uses an

algebraic syntax for ease of coding and readability.

The instruction types are grouped into four categories:

Compute and Move or Modify

Program Flow Control

Immediate Move

Miscellaneous

The instruction types are numbered; there are 22 types. Some

instructions have more than one syntactical form; for example,

Instruction 4 has four distinct forms. The instruction number

itself has no bearing on programming, but corresponds to the

opcode recognized by the ADSP-21020 device.

Because of the width and orthogonality of the instruction word,

there are many possible instructions. For example, the ALU

supports 21 fixed-point operations and 24 floating-point

operations; each of these operations can be the compute portion

of an instruction.

The following pages provide an overview and summary of the

ADSP-21020 instruction set. For complete information, see the

ADSP-21020 User’s Manual. For additional reference informa-

tion, see the ADSP-21020 Programmer’s Quick Reference.

This section also contains several reference tables for using the

instruction set.

• Table I describes the notation and abbreviations used.

• Table II lists all condition and termination code mnemonics.

• Table III lists all register mnemonics.

• Tables IV through VII list the syntax for all compute

(ALU, multiplier, shifter or multifunction) operations.

• Table VIII lists interrupts and their vector addresses.

Similar Part No. - ADSP-21020KG-133

Manufacturer	Part #	Datasheet	Description
Analog Devices	ADSP-2100	2Mb / 36P	12.5 MIPS DSP Microprocessor
	ADSP-2100A	666Kb / 64P	ADSP-2100 Family DSP Microcomputers REV. B
	ADSP-2100A	668Kb / 64P	ADSP-2100 Family DSP Microcomputers REV. B
	ADSP-2100A	461Kb / 64P	ADSP-2100 Family DSP Microcomputers REV. B
	ADSP-2100A	667Kb / 64P	ADSP-2100 Family DSP Microcomputers REV. B

More results

Similar Description - ADSP-21020KG-133

Manufacturer	Part #	Datasheet	Description
ATMEL Corporation	TSC21020F	697Kb / 50P	Rad. Hard 32/40-bit IEEE Floating Point DSP
Intel Corporation	A80960KB20	2Mb / 44P	EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT
	80960KB	418Kb / 39P	EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT
	A80960KB25	2Mb / 44P	EMBEDDED 32-BIT MICROPROCESSOR WITH INTEGRATED FLOATING-POINT UNIT
Texas Instruments	TMS320C6748	2Mb / 254P	[Old version datasheet] Fixed/Floating-Point DSP
	TMS320C6742	1Mb / 167P	[Old version datasheet] Fixed/Floating-Point DSP
	TMS320C6748	2Mb / 242P	[Old version datasheet] Fixed/Floating-Point DSP
	TMS320C6746	1Mb / 216P	[Old version datasheet] Fixed/Floating-Point DSP
	TMS320C6748	2Mb / 254P	[Old version datasheet] Fixed/Floating-Point DSP
	TMS320C6748	1Mb / 273P	[Old version datasheet] Fixed- and Floating-Point DSP

More results

ADSP-21020KG-133 Datasheet(PDF) 6 Page - Analog Devices

ADSP-21020KG-133 Datasheet(HTML) 6 Page - Analog Devices

Similar Part No. - ADSP-21020KG-133

Similar Description - ADSP-21020KG-133

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL