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THE ALDC COMPRESSION ALGORITHM
The ALDC (Adaptive Lossless Data
Compression) algorithm is one variant of the LZ1
(Lempel-Ziv 1) class of data compression
algorithms, first proposed by Abraham Lempel and
Jacob Ziv in 1977.
LZ1 algorithms achieve compression by
building and maintaining a data structure, called a
HISTORYBUFFER. An LZ1 encode process and
an LZ1 decode process both initialize this structure
to the same known state, and update it in an identical
fashion. The encoder does this using the input data
it receives for compression, while the decoder
generates an identical data stream as its output,
which it also uses for the update process.
The compression process consists of examining
the incoming data stream to identify any sequences or
strings of data bytes which already exist in the encoder
history. If an identical such history is available to a
decoder, this matching string can be encoded and
output as a 2 element COPYPOINTER, containing a
byte count and history location. It is then possible for
a decoder to reproduce this string exactly, by copying
it from the given location in its own history. If the
COPYPOINTER can be encoded in fewer bits of
information than required for the data string it
specifies, compression is achieved.
If an incoming byte of data does not form part of
a matching string, a LITERAL, containing this
embedded value, is encoded and then output to
explicitly represent this byte.
A decoder performs the inverse operation by first
parsing a compressed data stream into LITERALS
and COPYPOINTERS for processing.
ALDC is a lossless algorithm, insuring that the
decompressed data output is exactly the same as the
uncompressed data input. QIC-154 Development
Standard describes this industry standard algorithm
in detail.
PORT A AND PORT B CONFIGURATION
Port A and Port B operate identically. They both
are 16-bit bidirectional data ports with parity
checking and generation. There are three
configuration registers associated with each port
and a polarity register that determines the polarity of
all of the control signals for that port.
The function of the control pin is determined by
either xCNF0[13, 12] bits or Command register
programmed for peripheral access. The polarity of
control signals are controlled by specific bits in the
Polarity registers.
Table 1:
Port A Interface Signals
Table 2:
Port B Interface Signals
SIGNAL
NAME
MASTER
SLAVE=0
SLAVE
SLAVE=1
APOL
bit
DIRECTION
ACIN
DACKA
DREQA
7
I
ACOUT
DREQA
DACKA
5
O
AWR
deasserted
AWR
4
O
ARD
deasserted
ARD
3
O
APCS
APCS
APCS
2
O
AAF
AAF
AAF
1
O
AAE
AAE
AAE
0
O
SIGNAL
NAME
MASTER
SLAVE=0
SLAVE
SLAVE=1
BPOL
bit
DIRECTION
BCIN
DACKB
DREQB
7
I
BCOUT
DREQB
DACKB
5
O
BWR
deasserted
BWR
4
O
BRD
deasserted
BRD
3
O
BPCS
BPCS
BPCS
2
O
BAF
BAF
BAF
1
O
BAE
BAE
BAE
0
O
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