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OXU121HP Datasheet(PDF) 11 Page - Oxford Semiconductor |
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OXU121HP Datasheet(HTML) 11 Page - Oxford Semiconductor |
11 / 22 page DS-0040 Aug 06 External--Free Release 11 Oxford Semiconductor, Inc. OXU121HP Data Sheet Table 13 lists the LQFP pin allocations. Table 13 OXU121HP 100-Pin LQFP Pin Allocations (Sheet 1 of 3) Pin No. Bits Type(1) Name Description Processor Interface (37 pins) 2, 3, 4, 5, 8, 9, 10, 11, 13, 14, 15, 16, 96, 97, 98, 99 16 MSBCT D0 - D15 16-bit data bus. Pull-up/pull-down can be controlled through register 0x034, bits 2:1. Default is none 22, 23, 24, 25, 28, 29, 30 32, 33, 34, 35, 36 12 MSID A1 - A12 Address bus for direct address space of 8 Kbytes. Pull-up can be enabled through register 0x034, bits 9:8. Default is pull-down 20 1 MSIU /WR Write strobe. Pull-up can be disabled through register 0x034, bit 13. Default is pull-up 21 1 MSIU /RD Read strobe. Pull-up can be disabled through register 0x034, bit 13. Default is pull-up 39 1 MSIU /CS Chip select. Pull-up can be disabled through register 0x034, bit 13. Default is pull-up 19 1 MOCT /INT Interrupt to the MCU.This pin can be software configured as a driven output or open drain. Open drain is the default 86 1 MSIU /RESET Hardware reset. Pull-up is always enabled 89, 92 2 MOCT DRQ1, DRQ0 DMA request outputs to support two channels 90, 93 2 MSI ACK1, ACK0 DMA acknowledge. Pull-up/pull-down can be controlled through register 0x03A, bits 1:0. Default is none General Purpose I/O (1 pin) 88 1 BC GPIO General purpose I/O Power & Ground (34 pins) 1, 12, 27, 41, 51, 65, 75, 83 8VSS Digital/wide-range ground 42, 47, 69, 74, 82 5 VSSA Analog ground 6, 18, 40, 53, 57, 66, 84, 100 8VDD1.8 1.8 V core power. VREGOUT may be used for the supplies 43, 48, 70, 73, 81 5 VDD3.3A Analog +3.3 V power 56, 78 2 VDD3.3 Digital +3.3 V power 7, 17, 26, 31, 85, 95 6VDDW Wide-range I/O +1.8 V to +3.3 V. If using +1.8 V, VREGOUT may be used for these supplies USB Interface (13 pins) 76, 77 2 B DP2, DM2 Data lines for host port 2, a dedicated USB host port. If not used, these pins should be left floating 54, 55 2 B DP1, DM1 Data lines for host port 1, which can serve as a USB host or an OTG port in combination with the peripheral port. If not used, these pins should be left floating |
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