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OXMPCI954 Datasheet(PDF) 6 Page - Oxford Semiconductor |
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OXMPCI954 Datasheet(HTML) 6 Page - Oxford Semiconductor |
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6 / 121 page  DS-0019 Jun 05 External—Free Release Page 6 OXmPCI954 OXFORD SEMICONDUCTOR LTD. 1 PERFORMANCE COMPARISON Feature OXmPCI954 16C554 + PCI Bridge 16C654 + PCI Bridge Internal serial channels 4 0 0 Integral IEEE 1284 EPP/ECP parallel port yes no no Multi-function PCI device yes no no Support for PCI Power Management yes no no Zero wait-state write operation yes1 no no No. of available Local Bus interrupt pins 12 2 2 DWORD access to UART Interrupt Source Registers & FIFO Levels yes no no Good-Data status yes no no Full Plug and Play with external EEPROM yes yes yes Subsystem Vendor ID & Subsystem ID with no external EEPROM yes no no External 1x baud rate clock yes no no Max baud rate in normal mode 15 Mbps 115 Kbps 1.5 Mbps Max baud rate in 1x clock mode 60 Mbps n/a n/a FIFO depth 128 16 64 Sleep mode yes no yes Auto Xon/Xoff flow yes no yes Auto CTS#/RTS# flow yes no yes Auto DSR#/DTR# flow yes no no No. of Rx interrupt thresholds 128 4 4 No. of Tx interrupt thresholds 128 1 4 No. of flow control thresholds 128 n/a 4 Transmitter empty interrupt yes no no Readable status of flow control yes no no Readable FIFO levels yes no no Clock prescaler options 248 n/a 2 Rx/Tx disable yes no no Software reset yes no no Device ID yes no no 9-bit data frames yes no no RS485 buffer enable yes no no Infra-red (IrDA) yes no yes Table 1: OXmPCI954 performance compared with PCI Bridge + generic UART combinations Note 1: Zero wait-state applies only to the internal UARTs (after the assertion of DEVSEL#). Read operation incurs 1 wait state. |
Similar Part No. - OXMPCI954 |
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Similar Description - OXMPCI954 |
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