Electronic Components Datasheet Search |
|
IDT74ALVCH16823 Datasheet(PDF) 1 Page - Integrated Device Technology |
|
IDT74ALVCH16823 Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 7 page INDUSTRIALTEMPERATURERANGE IDT74ALVCH16823 3.3VCMOS18-BITBUS-INTERFACEFLIP-FLOPWITH3-STATEOUTPUTS 1 JANUARY 2004 INDUSTRIAL TEMPERATURE RANGE The IDT logo is a registered trademark of Integrated Device Technology, Inc. © 2004 Integrated Device Technology, Inc. DSC-4237/2 FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) •VCC = 3.3V ± 0.3V, Normal Range •VCC = 2.7V to 3.6V, Extended Range •VCC = 2.5V ± 0.2V • CMOS power levels (0.4 µµµµµ W typ. static) • Rail-to-Rail output swing for increased noise margin • Available in TSSOP package FUNCTIONAL BLOCK DIAGRAM DRIVE FEATURES: • High Output Drivers: ±24mA • Suitable for heavy loads APPLICATIONS: • 3.3V high speed systems • 3.3V and lower voltage computing systems IDT74ALVCH16823 3.3V CMOS 18-BIT BUS-INTERFACE FLIP- FLOP WITH 3-STATE OUT- PUTS AND BUS-HOLD DESCRIPTION: This18-bitbus-interfaceflip-flopisbuiltusingadvanceddualmetalCMOS technology.TheALVCH16823features3-stateoutputsdesignedspecifically for driving highly capacitive or relatively low-impedance loads. The device is particularlysuitableforimplementingwiderbufferregisters,I/Oports,bidirec- tional bus drivers with parity, and working registers. TheALVCH16823canbeusedastwo9-bitflip-flopsorone18-bitflip-flop. Withtheclock-enable(CLKEN)inputlow,theD-typeflip-flopsenterdataonthe low-to-hightransitionsoftheclock.TakingCLKENhighdisablestheclockbuffer, thuslatchingtheoutputs.Takingtheclear(CLR)inputlowcausestheQoutputs to go low independently of the clock. A buffered output-enable (OE)input can beused to placethenineoutputs ineitheranormallogicstate(highorlowlogiclevels)orahigh-impedancestate. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capabilitytodrivebuslineswithoutneedforinterfaceorpullupcomponents.The OEinputdoesnotaffecttheinternaloperationoftheflip-flops.Olddatacanbe retainedornewdatacanbeenteredwhiletheoutputsareinthehigh-impedance state. The ALVCH16823 has been designed with a ±24mA output driver. This driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed performance. The ALVCH16823 has “bus-hold” which retains the inputs’ last state whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputsand eliminatestheneedforpull-up/downresistor. TO 8 OTHER CHANNELS 1 OE 2 56 55 1 CE R C 1 3 1 Q1 D1 1 CLR 1 CLKEN 1 CLK 1 D1 54 TO 8 OTHER CHANNELS 2 OE 27 29 30 28 CE R C 1 15 2 Q1 D1 2 CLR 2 CLKE N 2 CLK 2 D 1 42 |
Similar Part No. - IDT74ALVCH16823 |
|
Similar Description - IDT74ALVCH16823 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |