SM535-1 datasheet(1/1 Pages) BOURNS | ADSL Line Transformers

1 / 1 page

SM535-1 ADSL Line Transformers

Features

■

For use with Texas Instruments’

TNET D 4000 C/P chipset

■

Excellent Total Harmonic Distortion

(THD) Performance

■

SMT and small size package

■

Designed to meet IEC1950

■

Operating temperature -40 °C to +85 °C

■

Designed to meet UL1950 and EN60950

supplementary insulation requirements

for operating voltages up to 250 Vrms

■

Lead free version available (see How to

Order)

■

Lead free versions are RoHS compliant*

Applications

■

ADSL - TI TNET D4000 C/P

Electrical Specifications @ 25 °C

Turns Ratio

(10-7):(1-4) chip to line ......1:1.95 ±2 %

OCL @ 10 kHz, 0.1V

(1-4) ..............................1.5 mH ±10 %

Leakage Inductance @ 10 kHz 0.1 V

(1-4) with (10-7) shorted..12.0 µH max.

Interwinding Capacitance

@ 10 kHz, 0.1 V (1-10) ........35 pF max.

Isolation Voltage ............1500 Vrms max.

DC Resistance ........................2.0 Ω max.

Application ..........................................CO

Product Dimensions

SM535-1

(DATECODE)

.711 ± .050

(.028 ± .002)

Recommended PAD layout

10 PLCS.

1.30 ± .050

(.051 ± .002)

10 PLCS.

13.46

(.530)

MAX.

10.00

(.394)

10.00

(.394)

MAX.

17.65

(.695)

MAX.

13.50

(.531)

MAX.

12.32

(.485)

MAX.

12.07

(.475)

MAX.

2.50

(.098)

2.50

(.098)

15.37

(.605)

2.54

(.100)

0.13

(.005)

10 SURFACES

Electrical Schematic

Chip

Line

1 : 1.95

DIMENSIONS ARE:

(INCHES)

TOLERANCE: ±

0.25

(.010)

SM535-1

Packaging Specifications

Tape & Reel* ........................200 pcs./reel

*”E” suffix at end of part number

designates tape & reel packaging, e.g.

SM535-1E.

03/05

*RoHS Directive 2002/95/EC Jan 27 2003 including Annex

Specifications are subject to change without notice.

Customers should verify actual device performance in their specific applications.

How to Order

SM535-1E __

Model

Termination

Blank = Tin-lead

L = Tin only (lead free)

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