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IDT74ALVCH16501 Datasheet(PDF) 2 Page - Integrated Device Technology

Part No. IDT74ALVCH16501
Description  3.3V CMOS 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74ALVCH16501 Datasheet(HTML) 2 Page - Integrated Device Technology

   
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INDUSTRIALTEMPERATURERANGE
2
IDT74ALVCH16501
3.3VCMOS18-BITUNIVERSALBUSTRANSCEIVERWITH3-STATEOUTPUTS
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
OEAB
LEAB
A1
GND
A2
A3
VCC
A4
A5
GND
A6
A7
A8
A9
GND
A10
A11
VCC
A12
A13
OEBA
A14
A15
LEBA
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
GND
B1
B2
GND
B3
B4
VCC
B5
B6
GND
B7
B8
B9
B10
GND
B11
B12
VCC
B13
B14
GND
B15
B16
GND
A16
A17
25
26
27
28
32
31
30
29
B18
GND
A18
CLKBA
B17
CLKAB
Symbol
Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to +4.6
V
VTERM(3) Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
±50
mA
VI < 0 or VI > VCC
IOK
Continuous Clamp Current, VO < 0
–50
mA
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
NOTE:
1. As applicable to the device type.
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
5
7
pF
COUT
Output Capacitance
VOUT = 0V
7
9
pF
CI/O
I/O Port Capacitance
VIN = 0V
7
9
pF
CAPACITANCE (TA= +25°C, F = 1.0MHz)
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
Pin Names
Description
OEAB
A-to-B Output Enable Input
OEBA
B-to-A Output Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input
LEBA
B-to-A Latch Enable Input
CLKAB
A-to-B Clock Input
CLKBA
B-to-A Clock Input
A x
A-to-B Data Inputs or B-to-A 3-State Outputs(1)
B x
B-to-A Data Inputs or A-to-B 3-State Outputs(1)
PIN DESCRIPTION


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