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IDT74CBTLV3244 Datasheet(PDF) 4 Page - Integrated Device Technology

Part No. IDT74CBTLV3244
Description  LOW-VOLTAGE OCTAL BUS SWITCH
Download  5 Pages
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT74CBTLV3244 Datasheet(HTML) 4 Page - Integrated Device Technology

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INDUSTRIALTEMPERATURERANGE
IDT74CBTLV3244
LOW-VOLTAGE OCTAL BUS SWITCH
Open
VLOAD
GND
VCC
Pulse
Generator
D.U.T.
500
500
CL
RT
VIN
VOUT
(1, 2)
SAME PHASE
IN PU T TRANSITION
OPPOSITE PHASE
IN PU T TRANSITION
0V
0V
VOH
VOL
tPLH
tPHL
tPHL
tPLH
OUTPUT
VIH
VT
VT
VIH
VT
CONTROL
IN PU T
tPLZ
0V
OUTPUT
NORMALLY
LOW
tPZH
0V
SW ITCH
CL O SE D
OUTPUT
NORMALLY
HIGH
ENABLE
DISABLE
SW ITCH
OPE N
tPHZ
0V
VOL + VLZ
VOH
VT
VT
tPZL
VLOAD/2
VLOAD/2
VIH
VT
VOL
VOH -VHZ
PROPAGATION DELAY
TEST CIRCUITS FOR ALL OUTPUTS
ENABLE AND DISABLE TIMES
TEST CONDITIONS
Symbol
VCC(1)= 3.3V ± 0.3V
VCC(2)= 2.5V ± 0.2V
Unit
VLOAD
62 x Vcc
V
VIH
3Vcc
V
VT
1.5
VCC/2
V
VLZ
300
150
mV
VHZ
300
150
mV
CL
50
30
pF
TEST CIRCUITS AND WAVEFORMS
DEFINITIONS:
1. CL = Load capacitance: includes jig and probe capacitance.
2. RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
NOTES:
1. Pulse Generator for all pulses: Rate
≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for all pulses: Rate
≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
SWITCH POSITION
Test
Switch
tPLZ/tPZL
VLOAD
tPHZ/tPZH
GND
tPD
Open
NOTE:
1. Diagram shown for input control Enable-LOW and input Control
Disable-HIGH.


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