5 / 9 page
CY7C1009V33
CY7C109V33
5
Switching Waveforms
Read Cycle No. 1[9, 10]
Read Cycle No. 2 (OE Controlled)[10, 11]
Write Cycle No. 1 (CE1 or CE2 Controlled)
[12, 13]
Notes:
9.
Device is continuously selected. OE, CE1 = VIL, CE2 = VIH.
10. WE is HIGH for read cycle.
11. Address valid prior to or coincident with CE1 transition LOW and CE2 transition HIGH.
12. Data I/O is high impedance if OE = VIH.
13. If CE1 goes HIGH or CE2 goes LOW simultaneously with WE going HIGH, the output remains in a high-impedance state.
PREVIOUS DATA VALID
DATA VALID
tRC
tAA
tOHA
109V33–6
ADDRESS
DATA OUT
109V33–7
50%
50%
DATA VALID
tRC
tACE
tDOE
tLZOE
tLZCE
tPU
HIGH IMPEDANCE
tHZOE
tHZCE
tPD
HIGH
OE
CE1
ICC
ISB
IMPEDANCE
ADDRESS
CE2
DATA OUT
VCC
SUPPLY
CURRENT
109V33–8
tWC
DATA VALID
tAW
tSA
tPWE
tHA
tHD
tSD
tSCE
tSCE
CE1
ADDRESS
CE2
WE
DATA I/O
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
