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M374F3200DJ1-C Datasheet(PDF) 6 Page - Samsung semiconductor

Part No. M374F3200DJ1-C
Description  32M x 72 DRAM DIMM with ECC Using 16Mx4, 4K & 8K Refresh, 3.3V
Download  20 Pages
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Maker  SAMSUNG [Samsung semiconductor]
Homepage  http://www.samsung.com/Products/Semiconductor
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M374F3200DJ1-C Datasheet(HTML) 6 Page - Samsung semiconductor

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DRAM MODULE
M374F320(8)0DJ1-C
REV. 0.1 Oct. 2000
NOTES
An initial pause of 200us is required after power-up followed
by any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
Input voltage levels are Vih/Vil. VIH(min) and VIL(max) are ref-
erence levels for measuring timing of input signals. Transi-
tion times are measured between VIH(min) and VIL(max) and
are assumed to be 5ns for all inputs.
Measured with a load equivalent to 1 TTL loads and 100pF.
Operation within the
tRCD(max) limit insures that tRAC(max)
can be met.
tRCD(max) is specified as a reference point only.
If
tRCD is greater than the specified tRCD(max) limit, then
access time is controlled exclusively by
tCAC.
Assumes that
tRCD
tRCD(max).
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to VOH or
VOL.
tWCS, tRWD, tCWD and tAWD are non-restrictive operating
parameter. They are inclueded in the data sheet as electrical
characteristics only. If
tWCS
tWCS(min), the cycle is an early
write cycle and the data out pin will remain high impedance
for
the
duration
of
the
cycle.
If
tCWD
tCWD(min),
tRWD
tRWD(min) and tAWDtAWD(min), then the cycle is a
read-write cycle and the data output will contain the data
read from the selected address. If neither of the above conti-
tions are satisfied, The condition of the data out is indeterni-
mated.
Either
tRCH or tRRH must be satisfied for a read cycle.
Operation within the
tRAD(max) limit insures that tRAC(max)
can be met.
tRAD(max) is specified as a reference point only.
If
tRAD is greater than the specified tRAD(max) limit, then
access time is controlled exclusively by
tAA.
If RAS goes to high before CAS high going, the open circuit
condtion of the output is achieved by CAS high going. If CAS
goes to high before RAS high going, the open circuit cond-
tion of the output is achieved by RAS high going.
tASC
≥6ns.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.


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