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ADF4252 Datasheet(PDF) 1 Page - Analog Devices |
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ADF4252 Datasheet(HTML) 1 Page - Analog Devices |
1 / 28 page REV. B a ADF4252 Dual Fractional-N/Integer-N Frequency Synthesizer One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FEATURES 3.0 GHz Fractional-N/1.2 GHz Integer-N 2.7 V to 3.3 V Power Supply Separate VP Allows Extended Tuning Voltage to 5 V Programmable Dual Modulus Prescaler RF: 4/5, 8/9 IF: 8/9, 16/17, 32/33, 64/65 Programmable Charge Pump Currents 3-Wire Serial Interface Digital Lock Detect Power-Down Mode Programmable Modulus on Fractional-N Synthesizer Trade-Off Noise versus Spurious Performance APPLICATIONS Base Stations for Mobile Radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications Test Equipment CATV Equipment FUNCTIONAL BLOCK DIAGRAM ADF4252 2 DOUBLER OUTPUT MUX 4-BIT R COUNTER PHASE FREQUENCY DETECTOR LOCK DETECT CHARGE PUMP REFERENCE REFIN REFOUT VDD1 VDD2 VDD3 DVDD VP1 VP2 RSET 24-BIT DATA REGISTER CLK DATA LE RFINA RFINB CPRF CPIF 2 DOUBLER 15-BIT R COUNTER CHARGE PUMP PHASE FREQUENCY DETECTOR MUXOUT AGND1 AGND2 DGND CPGND1 CPGND2 IFINB IFINA FRACTIONAL N RF DIVIDER INTEGER N IF DIVIDER GENERAL DESCRIPTION The ADF4252 is a dual fractional-N/integer-N frequency synthesizer that can be used to implement local oscillators (LO) in the upconversion and downconversion sections of wireless receivers and transmitters. Both the RF and IF syn- thesizers consist of a low noise digital PFD (phase frequency detector), a precision charge pump, and a programmable refer- ence divider. The RF synthesizer has a - -based fractional interpolator that allows programmable fractional-N division. The IF synthesizer has programmable integer-N counters. A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and VCO (volt- age controlled oscillator). Control of all the on-chip registers is via a simple 3-wire inter- face. The devices operate with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use. |
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