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74LVC257APW Datasheet(PDF) 6 Page - NXP Semiconductors |
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74LVC257APW Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 10 page Philips Semiconductors Product specification 74LVC257A Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State) 1998 Jul 29 6 AC WAVEFORMS VM = 0.5 × VCC at VCC < 2.7 V VM = 1.5 V at VCC ≥ 2.7 V VX = VOL + 0.3 V at VCC ≥ 2.7 V VX = VOL + 0.1 × VCC at VCC < 2.7 V VY = VOH – 0.3 V at VCC ≥ 2.7V VY = VOH – 0.1 × VCC at VCC < 2.7 V VOL and VOH are the typical output voltage drop that occur with the output load. SV00641 VM S, nI0, nI1 INPUTS nY OUTPUT VM tPLH tPHL GND VCC VOL VOH Figure 1. Input (S, nl0, nl1) to output (nY) propagation delays. SV00642 outputs disabled outputs enabled outputs enabled tPHZ tPZH tPZL tPLZ OUTPUT HIGH-to-OFF OFF-to-HIGH OUTPUT LOW-to-OFF OFF-to-LOW VM VM OE INPUT VX VOL VOH VY GND GND VCC VI VM Figure 2. 3-state enable and disable times. TEST CIRCUIT PULSE GENERATOR VI RT D.U.T. VO CL 50pF S1 2 x VCC Open GND 500 Ω 500 Ω VCC VI t 2.7V VCC 2.7V – 3.6V 2.7V Test S1 GND tPLZ/tPZL 2 x VCC tPHZ/tPZH tPLH/tPHL Open SY00003 VCC Figure 3. Load circuitry for switching times. |
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