Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

74LVC16373A Datasheet(PDF) 6 Page - NXP Semiconductors

Part No. 74LVC16373A
Description  16-bit D-type transparent latch with 5 Volt tolerant inputs/outputs 3-State
Download  10 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo 

74LVC16373A Datasheet(HTML) 6 Page - NXP Semiconductors

 
Zoom Inzoom in Zoom Outzoom out
 6 / 10 page
background image
Philips Semiconductors
Product specification
74LVC16373A/
74LVCH16373A
16-bit D-type transparent latch with 5 Volt tolerant
inputs/outputs (3-State)
1998 Mar 17
6
DC ELECTRICAL CHARACTERISTICS (Continued)
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
°C to +85°C
UNIT
MIN
TYP1
MAX
IBHL
Bus hold LOW sustaining current
VCC = 3.0V; VI = 0.8V2, 3, 4
75
µA
IBHH
Bus hold HIGH sustaining current
VCC = 3.0V; VI = 2.0V2, 3, 4
–75
µA
IBHLO
Bus hold LOW overdrive current
VCC = 3.6V2, 3, 5
500
µA
IBHHO
Bus hold HIGH overdrive current
VCC = 3.6V2, 3, 5
–500
µA
NOTES:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
2. Valid for data inputs of bus hold parts (LVCH16-A) only.
3. For data inputs only, control inputs do not have a bus hold circuit.
4. The specified sustaining current at the data input holds the input below the specified VI level.
5. The specified overdrive current at the data input forces the data input to the opposite logic input state.
6. For bus hold parts, the bus hold circuit is switched off when Vi exceeds VCC allowing 5.5V on the input terminal.
AC CHARACTERISTICS
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
VCC = 3.3V ±0.3V
VCC = 2.7V
VCC = 1.2V
UNIT
MIN
TYP1
MAX
MIN
MAX
TYP
tPHL
tPLH
Propagation delay
Dn to Qn
1, 5
1.5
3.0
4.7
1.5
5.7
12
ns
tPHL
tPLH
Propagation delay
LE to Qn
2, 5
1.5
3.4
4.8
1.5
5.8
14
ns
tPZH
tPZL
3-State output enable time
OE to Qn
4, 5
1.5
3.5
5.5
1.5
6.5
18
ns
tPHZ
tPLZ
3-State output disable time
OE to Qn
4, 5
1.5
3.9
5.4
1.5
6.4
11
ns
tW
LE pulse width HIGH
2
3
2.0
3
ns
tsu
Set-up time Dn to LE
3
1.7
–0.1
1.7
ns
th
Hold time Dn to LE
3
1.2
0.1
1.2
ns
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V.
VOL and VOH are the typical output voltage drop that occur with the output load.
VX = VOL + 0.3V at VCC w 2.7V; VX = VOL + 0.1 VCC at VCC t 2.7V
VY = VOH –0.3V at VCC w 2.7V; VY = VOH – 0.1 VCC at VCC t 2.7V
SW00070
Dn INPUT
VM
tPHL
tPLH
VOL
VI
VM
GND
VOH
Qn OUTPUT
VM
Waveform 1. Input (Dn) to output (Qn) propagation delays
VM
VM
VM
VM
tw
tPHL
tPLH
LE INPUT
Qn OUTPUT
SW00071
VI
GND
VOH
VOL
VM
Waveform 2. Latch enable input (LE) pulse width, the latch
enable input to output (Qn) propagation delays


Html Pages

1  2  3  4  5  6  7  8  9  10 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn