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74LVC125 Datasheet(PDF) 2 Page - NXP Semiconductors

Part No. 74LVC125
Description  Quad buffer/line driver; 3-State
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC125 Datasheet(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVC125
Quad buffer/line driver; 3-State
2
1997 Mar 18
853–1951 17865
FEATURES
Wide supply voltage range of 1.2 to 3.6 V
In accordance with JEDEC standard no. 8-1A
Inputs accept voltages up to 5.5 V
CMOS lower power consumption
Direct interface with TTL levels
Output drive capability 50 W transmission lines at 85°C
DESCRIPTION
The 74LVC125 is a high performance, low-power, low-voltage
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
The 74LVC125 consists of four non-inverting buffers/line drivers with
3-State outputs. The 3-State outputs (nY) are controlled by the
output enable input (nOE). A HIGH at nOE causes the outputs to
assume a high impedance OFF-state.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
Propagation delay
nA to nY
CL = 15 pF;
VCC = 3.3 V
3.5
ns
CI
Input capacitance
5.0
pF
CPD
Power dissipation capacitance per buffer
Notes 1 and 2
22
pF
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi +Σ (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
Σ (CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic SO
–40
°C to +85°C
74LVC125 D
74LVC125 D
SOT108-1
14-Pin Plastic SSOP Type II
–40
°C to +85°C
74LVC125 DB
74LVC125 DB
SOT337-1
14-Pin Plastic TSSOP Type I
–40
°C to +85°C
74LVC125 PW
74LVC125PW DH
SOT402-1
PIN CONFIGURATION
SV00455
1
2
3
4
5
6
7
1OE
1A
1Y
2OE
2A
2Y
GND
VCC
4OE
4A
4Y
3OE
3A
3Y
14
13
12
11
10
9
8
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
NAME AND FUNCTION
1, 4, 10, 13
1OE – 4OE
Data enable inputs (active LOW)
2, 5, 9, 12
1A – 4A
Data inputs
3, 6, 8, 11
1Y – 4Y
Data Outputs
7
GND
Ground (0 V)
14
VCC
Positive supply voltage
LOGIC SYMBOL
SV00456
1Y
2Y
3Y
4Y
1
2
3
1OE
1A
4
5
6
2OE
2A
10
9
8
3OE
3A
13
12
11
4OE
4A


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