Philips Semiconductors

Product specification

74LVC109

Dual JK flip-flop with set and reset; positive-edge trigger

1998 Apr 28

5

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

Temp = -40

°C to +85°C

UNIT

MIN

MAX

V

HIGH level Input voltage

V

HIGH level Input voltage

2.0

V

V

LOW level Input voltage

GND

V

LOW level Input voltage

0.8

V

HIGH level output voltage

V

HIGH level output voltage

V

0.40

LOW level output voltage

GND

0.20

V

0.55

I

Input leakage current

"01

"5

µA

Input leakage current

"0.1

"5

µA

Quiescent supply current

0.1

10

µA

Additional quiescent supply current per

input pin

5

500

µA

NOTE:

AC CHARACTERISTICS

LIMITS

SYMBOL

PARAMETER

WAVEFORM

UNIT

MIN

MAX

MIN

TYP

NO TAG

MAX

Propagation delay

nCP to nQ, nQ

Figures 1, 3

4.3

7.5

8.5

ns

Propagation delay

Figures 2, 3

4.5

8.0

9.0

ns

Propagation delay

Figures 2, 3

5.2

9.0

10

ns

Clock pulse width

HIGH or LOW

Figure 1

3.3

2.0

ns

Set or reset pulse width

HIGH or LOW

Figure 2

3.0

ns

Removal time

Figure 2

3.0

ns

Set-up time

nJ, nK to CP

Figure 1

2.5

ns

Hold time

nJ, nK to nCP

Figure 1

2.0

ns

Maximum clock pulse

frequency

Figure 1

150

225

MHz

NOTE: