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LTC2287 Datasheet(PDF) 1 Page - Linear Technology |
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LTC2287 Datasheet(HTML) 1 Page - Linear Technology |
1 / 28 page LTC2288/LTC2287/LTC2286 1 228876f , LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO ■ Integrated Dual 10-Bit ADCs ■ Sample Rate: 65Msps/40Msps/25Msps ■ Single 3V Supply (2.7V to 3.4V) ■ Low Power: 400mW/235mW/150mW ■ 61.6dB SNR at 70MHz Input ■ 85dB SFDR at 70MHz Input ■ 110dB Channel Isolation at 100MHz ■ Multiplexed or Separate Data Bus ■ Flexible Input: 1VP-P to 2VP-P Range ■ 575MHz Full Power Bandwidth S/H ■ Clock Duty Cycle Stabilizer ■ Shutdown and Nap Modes ■ Pin Compatible Family 80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit) 65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit) 40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit) 25Msps: LTC2291 (12-Bit), LTC2286 (10-Bit) ■ 64-Pin (9mm × 9mm) QFN Package Dual 10-Bit, 65/40/25Msps Low Noise 3V ADCs The LTC ®2288/LTC2287/LTC2286 are 10-bit 65Msps/ 40Msps/25Msps, low noise dual 3V A/D converters de- signed for digitizing high frequency, wide dynamic range signals. The LTC2288/LTC2287/LTC2286 are perfect for demanding imaging and communications applications with AC performance that includes 61.6dB SNR and 85dB SFDR for signals well beyond the Nyquist frequency. DC specs include ±0.1LSB INL (typ), ±0.05LSB DNL (typ) and ±0.6 LSB INL, ±0.5 LSB DNL over temperature. The transition noise is a low 0.07LSBRMS. A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.3V logic. An optional multiplexer allows both channels to share one digital output bus. A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high perfor- mance at full speed for a wide range of clock duty cycles. LTC2288: SNR vs Input Frequency, –1dB, 2V Range, 65Msps – + INPUT S/H ANALOG INPUT A ANALOG INPUT B CLK A CLK B 10-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL OUTPUT DRIVERS • • • OVDD OGND MUX D9A D0A • • • OVDD OGND 228876 TA01 D9B D0B – + OUTPUT DRIVERS INPUT S/H 10-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL INPUT FREQUENCY (MHz) 0 59.5 60.5 200 228876 TA02 58.5 57.5 50 100 150 62.5 61.5 ■ Wireless and Wired Broadband Communication ■ Imaging Systems ■ Spectral Analysis ■ Portable Instrumentation |
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