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M36W0R5020T0 Datasheet(PDF) 3 Page - STMicroelectronics

Part No. M36W0R5020T0
Description  32 Mbit (2Mb x16, Multiple Bank, Burst) Flash Memory and 4 Mbit SRAM, 1.8V Supply Multi-Chip Package
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M36W0R5020T0 Datasheet(HTML) 3 Page - STMicroelectronics

 
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M36W0R5020T0, M36W0R5020B0
Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Standby/Power-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 3. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. AC Measurement Load Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5. Device Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 6. Flash Memory DC Characteristics - Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 7. Flash Memory DC Characteristics - Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 8. SRAM DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. SRAM Read Mode AC Waveforms, Address Controlled with UBS = LBS = VIL . . . . . . . 16
Figure 9. SRAM Read AC Waveforms, GS Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10.SRAM Standby AC Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 9. SRAM Read AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11.SRAM Write AC Waveforms, E1S or E2S Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12.SRAM Write AC Waveforms, WS Controlled, GS High during Write . . . . . . . . . . . . . . . . 19
Figure 13.SRAM Write AC Waveforms, WS Controlled with GS Low . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 14.SRAM Write AC Waveform, UBS and LBS Controlled GS Low . . . . . . . . . . . . . . . . . . . . 20
Table 10. SRAM Write AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 15.SRAM Low VDDS Data Retention AC Waveforms, E1S or UBS / LBS Controlled . . . . . . 22
Figure 16.SRAM Low VDDS Data Retention AC Waveforms, E2S Controlled . . . . . . . . . . . . . . . . . 22
Table 11. SRAM Low VDDS Data Retention Characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 17. Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch, Package Outline . . 23
Table 12. Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch, Mechanical Data . . 23
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 13. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 14. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25


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