IDT74ALVCH16952 datasheet(2/6 Pages) IDT | 3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD

Part #	IDT74ALVCH16952

Description	3.3V CMOS 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD

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Manufacturer	IDT [Integrated Device Technology]

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INDUSTRIALTEMPERATURERANGE

2

IDT74ALVCH16952

3.3VCMOS16-BITREGISTEREDTRANSCEIVERWITH3-STATEOUTPUTS

SSOP/ TSSOP/ TVSOP

TOP VIEW

PIN CONFIGURATION

FUNCTION TABLE(1,2)

Pin Names

Description

xOEAB

A-to-B Output Enable Input (Active LOW)

xOEBA

B-to-A Output Enable Input (Active LOW)

xCLKENAB

A-to-B Clock Enable Input (Active LOW)

xCLKENBA

B-to-A Clock Enable Input (Active LOW)

xCLKAB

A-to-B Clock Input

xCLKBA

B-to-A Clock Input

xAx

A-to-B Data Inputs or B-to-A 3-State Outputs(1)

xBx

B-to-A Data Inputs or A-to-B 3-State Outputs(1)

PIN DESCRIPTION

NOTE:

1. As applicable to the device type.

Symbol

Parameter(1)

Conditions

Typ.

Max.

Unit

CIN

Input Capacitance

VIN = 0V

5

7

pF

COUT

Output Capacitance

VOUT = 0V

7

9

pF

COUT

I/O Port Capacitance

VIN = 0V

7

9

pF

CAPACITANCE (TA= +25°C, F = 1.0MHz)

Symbol

Description

Max

Unit

VTERM(2) Terminal Voltage with Respect to GND

–0.5 to +4.6

V

VTERM(3) Terminal Voltage with Respect to GND

–0.5 to VCC+0.5

V

TSTG

Storage Temperature

–65 to +150

°C

IOUT

DC Output Current

–50 to +50

mA

IIK

Continuous Clamp Current,

±50

mA

VI < 0 or VI > VCC

IOK

Continuous Clamp Current, VO < 0

–50

mA

ICC

Continuous Current through each

±100

mA

ISS

VCC or GND

ABSOLUTE MAXIMUM RATINGS(1)

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause

permanent damage to the device. This is a stress rating only and functional operation

of the device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect reliability.

2. VCC terminals.

3. All terminals except VCC.

Inputs

Outputs

xCLKENAB

xCLKAB

xOEAB

xAx

xBx

HX

L

X

B(3)

XL

L

X

B(3)

L

↑

LL

L

↑

LH

H

XX

H

X

Z

NOTE:

1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.

1

OEAB

GND

1

A1

1

A2

VCC

1

A3

1

A4

GND

1

A5

1

A6

1

A7

1

A8

2

A2

2

A3

GND

2

A4

2

A5

2

A6

VCC

2

A7

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

48

49

50

51

52

53

54

55

56

1

OEBA

GND

1

B1

1

B2

VCC

1

B3

1

B4

1

B5

1

B6

1

B7

1

B8

GND

2

B2

2

B3

2

B4

2

B5

GND

2

B6

2

B7

2

B8

GND

2

CLKENAB

2

OEAB

25

26

27

28

32

31

30

29

GND

2

CLKENBA

2

CLKBA

2

OEBA

2

A1

2

A8

VCC

2

B1

1

CLKBA

2

CLKAB

1

CLKAB

1

CLKENBA

1

CLKENAB

NOTES:

1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCLKENBA, xCLKBA,

and xOEBA.

2. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

Z = High Impedance

↑ = LOW-to-HIGH Transition

3. Level of B before the indicated steady-state input conditions were established.

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IDT74ALVCH16952 Datasheet(PDF) 2 Page - Integrated Device Technology

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