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IDT74ALVCH16345 Datasheet(PDF) 2 Page - Integrated Device Technology

Part No. IDT74ALVCH16345
Description  3.3V CMOS REGISTERED ADDRESS LINE DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT74ALVCH16345 Datasheet(HTML) 2 Page - Integrated Device Technology

   
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INDUSTRIALTEMPERATURERANGE
2
IDT74ALVCH16345
3.3VCMOSREGISTEREDADDRESSLINEDRIVERWITH3-STATEOUTPUTS
TSSOP
TOP VIEW
PIN CONFIGURATION
CE1
GND
VCC
D1
GND
GND
VCC
D4
CLK
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
GND
VCC
GND
GND
VCC
GND
GND
25
26
27
28
32
31
30
29
OE
1
Q1
2
Q1
3
Q1
4
Q1
1
Q2
2
Q2
3
Q2
4
Q2
D2
D3
1
Q3
2
Q3
3
Q3
4
Q3
1
Q4
2
Q4
3
Q4
4
Q4
CE2
1
Q8
2
Q8
3
Q8
4
Q8
D8
1
Q7
2
Q7
3
Q7
4
Q7
D7
D6
1
Q6
2
Q6
3
Q6
4
Q6
D5
1
Q5
2
Q5
3
Q5
4
Q5
Symbol
Description
Max
Unit
VTERM(2) Terminal Voltage with Respect to GND
–0.5 to +4.6
V
VTERM(3) Terminal Voltage with Respect to GND
–0.5 to VCC+0.5
V
TSTG
Storage Temperature
–65 to +150
°C
IOUT
DC Output Current
–50 to +50
mA
IIK
Continuous Clamp Current,
±50
mA
VI < 0 or VI > VCC
IOK
Continuous Clamp Current, VO < 0
–50
mA
ICC
Continuous Current through each
±100
mA
ISS
VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
NOTE:
1. As applicable to the device type.
Symbol
Parameter(1)
Conditions
Typ.
Max.
Unit
CIN
Input Capacitance
VIN = 0V
5
7
pF
COUT
Output Capacitance
VOUT = 0V
7
9
pF
CI/O
I/O Port Capacitance
VIN = 0V
7
9
pF
CAPACITANCE (TA= +25°C, F = 1.0MHz)
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
↑ = LOW-to-HIGH Transition
2. Output level before the indicated steady-state input conditions were established.
FUNCTION TABLE(1)
Inputs
Output
CEx
CLK
OE
Dx
xQx
HX
L
X
B2
XL
L
X
B2
L
LL
L
L
LH
H
XX
H
X
Z
NOTE:
1. These pins have "Bus-Hold". All other pins are standard inputs, outputs, or I/Os.
Pin Names
Description
OE
3-State Output Enable Inputs (Active LOW)
Dx
Data Inputs(1)
xQx
3-State Data Outputs
CLK
Clock Input
CEx
Clock Enable Inputs (Active LOW)
PIN DESCRIPTION


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