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74HCT401 Datasheet(PDF) 3 Page - NXP Semiconductors |
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74HCT401 Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 11 page December 1990 3 Philips Semiconductors Product specification 8-bit synchronous BCD down counter 74HC/HCT40102 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 CP clock input (LOW-to-HIGH, edge-triggered) 2 MR asynchronous master reset input (active LOW) 3 TE terminal enable input 4, 5, 6, 7, 10, 11, 12, 13 P0 to P7 jam inputs 8 GND ground (0 V) 9 PL asynchronous preset enable input (active LOW) 14 TC terminal count output (active LOW) 15 PE synchronous preset enable input (active LOW) 16 VCC positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. |
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