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N85C224-80 Datasheet(PDF) 8 Page - Altera Corporation |
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N85C224-80 Datasheet(HTML) 8 Page - Altera Corporation |
8 / 16 page 8 Altera Corporation EP220 & EP224 Classic EPLDs Power-On Characteristics The EP220 and EP224 inputs and outputs respond a maximum of 1 µs after VCC power-up (VCC = 4.75 V), or after a power-loss/power-up sequence. All macrocells that are programmed as registers are set to a logic low on power-up. Design Security EP220 and EP224 devices contain a programmable Security Bit that controls access to the data programmed into the device. When this bit is turned on, a proprietary design implemented in the device cannot be copied or retrieved. This feature provides a high level of design security, because programmed data within EPROM cells is invisible. The Security Bit that controls this function, as well as all other program data, is reset when a device is erased. Turbo Bit The -10A and -12 speed grades of the EP220 and EP224 devices contain a programmable Turbo Bit to control the automatic power-down feature that enables the low-standby-power mode (ICC). When the Turbo Bit is turned on, the low-standby-power mode is disabled. All AC values are tested with the Turbo Bit turned on. When the device is operating with the Turbo Bit turned off (non-turbo mode), a non-turbo adder must be added to the appropriate AC parameter to determine worst-case timing. The non-turbo adder is specified in the “AC Operating Conditions” tables in this data sheet. Generic Testing EP220 and EP224 devices are fully functionally tested and guaranteed. Complete testing of each programmable EPROM configuration element and all internal logic elements ensures 100% programming yield. Figure 3 shows AC test conditions. Texas Instruments, Inc. (continued) TIBPAL16L8 EP220-12 -12 TIBPAL16R6 TIBPAL16R8 TIBPAL20L8 EP224-12 TIBPAL20R6 TIBPAL20R8 Table 1. EP220- and EP224-Compatible Devices (Part 4 of 4) PAL/GAL Vendor PAL/GAL Device Altera Replacement Device Speed Grade |
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