FLASH MEMORY

K8S6415ET(B)B

Revision 1.1

January, 2006

9

Table 5. Command Sequences

Command Definitions

Cycle

1st Cycle 2nd Cycle 3rd Cycle

4th Cycle

5th Cycle 6th Cycle

Asynchronous Read

Add

1

RA

Data

RD

Reset(Note 5)

Add

1

XXXH

Data

F0H

Autoselect

Manufacturer ID(Note 6)

Add

4

555H

2AAH

(DA)555H

(DA)X00H

Data

AAH

55H

90H

ECH

Autoselect

Device ID(Note 6)

Add

4

555H

2AAH

(DA)555H

(DA)X01H

Data

AAH

55H

90H

Note6

Autoselect

Block Protection Verify(Note 7)

Add

4

555H

2AAH

(BA)555H

(BA)X02H

Data

AAH

55H

90H

00H/01H

Program

Add

4

555H

2AAH

555H

PA

Data

AAH

55H

A0H

PD

Unlock Bypass

Add

3

555H

2AAH

555H

Data

AAH

55H

20H

Unlock Bypass Program(Note 8)

Add

2

XXX

PA

Data

A0H

PD

Unlock Bypass Block Erase(Note 8)

Add

2

XXX

BA

Data

80H

30H

Unlock Bypass Chip Erase(Note 8)

Add

2

XXXH

XXXH

Data

80H

10H

Unlock Bypass Reset

Add

2

XXXH

XXXH

Data

90H

00H

Quadruple word Accelerated Program(Note9)

Add

5

XXX

PA1

PA2

PA3

PA4

Data

A5H

PD1

PD2

PD3

PD4

Chip Erase

Add

6

555H

2AAH

555H

555H

2AAH

555H

Data

AAH

55H

80H

AAH

55H

10H

Block Erase

Add

6

555H

2AAH

555H

555H

2AAH

BA

Data

AAH

55H

80H

AAH

55H

30H

Erase Suspend (Note 10)

Add

1

(DA)XXXH

Data

B0H

Erase Resume (Note 11)

Add

1

(DA)XXXH

Data

30H

Program Suspend (Note12)

Add

1

(DA)XXXH

Data

B0H

Program Resume (Note11)

Add

1

(DA)XXXH

Data

30H

COMMAND DEFINITIONS

The K8S6415E operates by selecting and executing its operational modes. Each operational mode has its own command set. In

order to select a certain mode, a proper command with specific address and data sequences must be written into the command reg-

ister. Writing incorrect information which include address and data or writing an improper command will reset the device to the read

mode. The defined valid register command sequences are stated in Table 5.