XRD54L08/L10/L12

9

Rev. 1.30

Figure 6. Shift Register Format

DOUT

SDIN

X

X

X

X

DAC

MSB

n

The DACs are programmed by a 16 bit word of serial data.

The format of the serial input register is shown in Figure 6.

The leading 4 bits are not used to update the DAC. If the

DAC is not daisy-chained then only a 12 bit serial word is

needed to program the DAC. The next 8, 10 or 12 bits

after the 4 leading bits are data bits. The XRD54L08’s first

8 bits are valid data and the trailing 4 bits must be set to 0.

Figure 7 demonstrates the 16 bit digital word for the 8,

10,12 bit DACs.

Part

Leading

Unused

Bits

Data Bits

MSB

LSB

Trailing

“0”

Bits

XRD54L12

XXXX

XXXXXXXX

None

XRD54L10

XXXX

XXXXXXXX

00

XRD54L08

XXXX

XXXXXXXX

0000

Table 2. 16-Bit Digital Word Register for XRD54L08,

XRD54L10, XRD54L12.

SCLK should be held low when CS transitions low. Data is

clocked in on the rising edge of SCLK when CS is low.

SDIN data is held in a 16 bit serial shift register. The DAC

is updated with the data bits on the rising edge of CS.

When CS is high data is not shifted into the

XRD54L08/L10/L12.

Daisy-Chaining

The digital output port (DOUT) has a 4mA drive for greater

fan-out capability when daisy-chaining. DOUT allows

cascading of multiple DACs with the same serial data

stream. The data at SDIN appears at DOUT after 16 clock

CS is high. DOUT changes on the falling edge of SCLK

when CS is low.

Any number of DACs can be connected in this way by

connecting DOUT of one DAC to SDIN of the next DAC.

low impedance grounding as shown in

Figure 7. If the

divider between the DAC string impedance and ground

impedance. See the Power Supply and Grounding

section for recommendations.

The typical AC

feedthrough for a 1kHz 2Vpp signal with code = 0 is

-80dB.

Circuit, DAC Code =0

XRD54L08/L10/L12

GND

RGND

Analog GND

--

+

Compatible with MAX515 & MAX539

The XRD54L08/L10/L12 family of DACs are functionally

campatible with the MAX515 & MAX539 while providing

significant improvements.

The XRD54L08/L10/L12

DACs have lower power, faster serial ports, and a

constant reference impedance to minimize the reference

driving requirements and maximize system linearity while